Search

Larry T. Mackall

Examiner (ID: 10850, Phone: (571)270-1172 , Office: P/2131 )

Most Active Art Unit
2139
Art Unit(s)
2131, 2139, 2189
Total Applications
904
Issued Applications
724
Pending Applications
65
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11686543 [patent_doc_number] => 09684590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'Storing corresponding data units in a common storage unit' [patent_app_type] => utility [patent_app_number] => 13/027620 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15303 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027620 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027620
Storing corresponding data units in a common storage unit Feb 14, 2011 Issued
Array ( [id] => 9695355 [patent_doc_number] => 08825983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Data communications in a parallel active messaging interface of a parallel computer' [patent_app_type] => utility [patent_app_number] => 13/027421 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 19743 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027421 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027421
Data communications in a parallel active messaging interface of a parallel computer Feb 14, 2011 Issued
Array ( [id] => 11795839 [patent_doc_number] => 09405668 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-08-02 [patent_title] => 'Data storage device initialization information accessed by searching for pointer information' [patent_app_type] => utility [patent_app_number] => 13/027432 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3399 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027432
Data storage device initialization information accessed by searching for pointer information Feb 14, 2011 Issued
Array ( [id] => 12331836 [patent_doc_number] => 09946606 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-17 [patent_title] => Stream architecture for data representation [patent_app_type] => utility [patent_app_number] => 12/926438 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 7504 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12926438 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926438
Stream architecture for data representation Nov 17, 2010 Issued
Array ( [id] => 8189100 [patent_doc_number] => 20120117306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'SENSE OPERATION FLAGS IN A MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/942152 [patent_app_country] => US [patent_app_date] => 2010-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3648 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117306.pdf [firstpage_image] =>[orig_patent_app_number] => 12942152 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/942152
Sense operation flags in a memory device Nov 8, 2010 Issued
Array ( [id] => 9714331 [patent_doc_number] => 08838932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Power economizing by powering down hub partitions' [patent_app_type] => utility [patent_app_number] => 12/942853 [patent_app_country] => US [patent_app_date] => 2010-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5497 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12942853 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/942853
Power economizing by powering down hub partitions Nov 8, 2010 Issued
Array ( [id] => 8189126 [patent_doc_number] => 20120117320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'LATENCY REDUCTION ASSOCIATED WITH A RESPONSE TO A REQUEST IN A STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/941112 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5733 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117320.pdf [firstpage_image] =>[orig_patent_app_number] => 12941112 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941112
Latency reduction associated with a response to a request in a storage system Nov 7, 2010 Issued
Array ( [id] => 10021627 [patent_doc_number] => 09064116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Techniques for security management provisioning at a data storage device' [patent_app_type] => utility [patent_app_number] => 12/941915 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 9225 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12941915 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941915
Techniques for security management provisioning at a data storage device Nov 7, 2010 Issued
Array ( [id] => 8189145 [patent_doc_number] => 20120117330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-10 [patent_title] => 'METHOD AND APPARATUS FOR SELECTIVELY BYPASSING A CACHE FOR TRACE COLLECTION IN A PROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/941576 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20120117330.pdf [firstpage_image] =>[orig_patent_app_number] => 12941576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941576
Method and apparatus for selectively bypassing a cache for trace collection in a processor Nov 7, 2010 Issued
Array ( [id] => 9029575 [patent_doc_number] => 08539172 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-17 [patent_title] => 'System and method for accessing data in an external virtual memory' [patent_app_type] => utility [patent_app_number] => 12/941246 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7932 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12941246 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941246
System and method for accessing data in an external virtual memory Nov 7, 2010 Issued
Array ( [id] => 10860668 [patent_doc_number] => 08886885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Systems and methods for operating a plurality of flash modules in a flash memory file system' [patent_app_type] => utility [patent_app_number] => 12/940377 [patent_app_country] => US [patent_app_date] => 2010-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3298 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12940377 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/940377
Systems and methods for operating a plurality of flash modules in a flash memory file system Nov 4, 2010 Issued
Array ( [id] => 8728272 [patent_doc_number] => 08407413 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-03-26 [patent_title] => 'Hardware flow classification for data storage services' [patent_app_type] => utility [patent_app_number] => 12/940958 [patent_app_country] => US [patent_app_date] => 2010-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12940958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/940958
Hardware flow classification for data storage services Nov 4, 2010 Issued
Array ( [id] => 11239083 [patent_doc_number] => 09465728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Memory controller adaptable to multiple memory devices' [patent_app_type] => utility [patent_app_number] => 12/939135 [patent_app_country] => US [patent_app_date] => 2010-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3511 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12939135 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/939135
Memory controller adaptable to multiple memory devices Nov 2, 2010 Issued
Array ( [id] => 8176531 [patent_doc_number] => 20120110269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'PREFETCH INSTRUCTION' [patent_app_type] => utility [patent_app_number] => 12/916624 [patent_app_country] => US [patent_app_date] => 2010-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7218 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20120110269.pdf [firstpage_image] =>[orig_patent_app_number] => 12916624 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/916624
Prefetch instruction that ignores a cache hit Oct 30, 2010 Issued
Array ( [id] => 9585709 [patent_doc_number] => 08775719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with parallel interface' [patent_app_type] => utility [patent_app_number] => 12/807996 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 19745 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12807996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/807996
NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with parallel interface Sep 16, 2010 Issued
Array ( [id] => 9947457 [patent_doc_number] => 08996785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface' [patent_app_type] => utility [patent_app_number] => 12/807997 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 16560 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12807997 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/807997
NAND-based hybrid NVM design that integrates NAND and NOR in 1-die with serial interface Sep 16, 2010 Issued
Array ( [id] => 5976470 [patent_doc_number] => 20110154013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'ELECTRONIC WASTE AND CARBON FOOTPRINT REDUCTION SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/836806 [patent_app_country] => US [patent_app_date] => 2010-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9171 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20110154013.pdf [firstpage_image] =>[orig_patent_app_number] => 12836806 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836806
ELECTRONIC WASTE AND CARBON FOOTPRINT REDUCTION SYSTEM Jul 14, 2010 Abandoned
Array ( [id] => 10879336 [patent_doc_number] => 08904134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'Method and system of communication between a transponder and a base station' [patent_app_type] => utility [patent_app_number] => 12/836047 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2657 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836047
Method and system of communication between a transponder and a base station Jul 13, 2010 Issued
Array ( [id] => 7503773 [patent_doc_number] => 20110264885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'CONTROLLING CIRCUIT APPLICABLE IN PHYSICAL STORAGE DEVICE AND RELATED METHOD' [patent_app_type] => utility [patent_app_number] => 12/836561 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3350 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20110264885.pdf [firstpage_image] =>[orig_patent_app_number] => 12836561 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836561
CONTROLLING CIRCUIT APPLICABLE IN PHYSICAL STORAGE DEVICE AND RELATED METHOD Jul 13, 2010 Abandoned
Array ( [id] => 9218394 [patent_doc_number] => 08631204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Multi-resolution cache monitoring' [patent_app_type] => utility [patent_app_number] => 12/836296 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3707 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12836296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836296
Multi-resolution cache monitoring Jul 13, 2010 Issued
Menu