Search

Larry T. Mackall

Examiner (ID: 13653, Phone: (571)270-1172 , Office: P/2131 )

Most Active Art Unit
2139
Art Unit(s)
2131, 2189, 2139
Total Applications
893
Issued Applications
713
Pending Applications
67
Abandoned Applications
134

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3107275 [patent_doc_number] => 05313616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Method for analyzing calls of application program by inserting monitoring routines into the executable version and redirecting calls to the monitoring routines' [patent_app_type] => 1 [patent_app_number] => 7/584189 [patent_app_country] => US [patent_app_date] => 1990-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 11458 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313616.pdf [firstpage_image] =>[orig_patent_app_number] => 584189 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584189
Method for analyzing calls of application program by inserting monitoring routines into the executable version and redirecting calls to the monitoring routines Sep 17, 1990 Issued
Array ( [id] => 2989909 [patent_doc_number] => 05257364 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Method for generating a correlated sequence of variates with desired marginal distribution for testing a model of a communications system' [patent_app_type] => 1 [patent_app_number] => 7/581522 [patent_app_country] => US [patent_app_date] => 1990-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 11380 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/257/05257364.pdf [firstpage_image] =>[orig_patent_app_number] => 581522 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/581522
Method for generating a correlated sequence of variates with desired marginal distribution for testing a model of a communications system Sep 11, 1990 Issued
07/580688 DATA PROCESSING APPARATUS WITH OPTICAL VECTOR MATRIX MULTIPIER AND PERIPHERAL CIRCUITS Sep 10, 1990 Abandoned
Array ( [id] => 3058987 [patent_doc_number] => 05287493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Database interactive prompted query system having named database tables linked together by a user through join statements' [patent_app_type] => 1 [patent_app_number] => 7/576022 [patent_app_country] => US [patent_app_date] => 1990-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3530 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287493.pdf [firstpage_image] =>[orig_patent_app_number] => 576022 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/576022
Database interactive prompted query system having named database tables linked together by a user through join statements Aug 30, 1990 Issued
Array ( [id] => 2999012 [patent_doc_number] => 05212801 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Apparatus for responding to completion of each transition of a driver output signal for damping noise by increasing driver output impedance' [patent_app_type] => 1 [patent_app_number] => 7/576006 [patent_app_country] => US [patent_app_date] => 1990-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3060 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212801.pdf [firstpage_image] =>[orig_patent_app_number] => 576006 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/576006
Apparatus for responding to completion of each transition of a driver output signal for damping noise by increasing driver output impedance Aug 30, 1990 Issued
07/574410 TELEVISION RECEIVING SYSTEM EMPLOYING SINGLE-INSTRUCTION, MULTIPLE- DATA PROCESSORS HAVING PARALLEL INPUT TO INTERLEAVED PROCESSORS Aug 27, 1990 Abandoned
Array ( [id] => 3059664 [patent_doc_number] => 05287529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Method for estimating solutions to finite element equations by generating pyramid representations, multiplying to generate weight pyramids, and collapsing the weighted pyramids' [patent_app_type] => 1 [patent_app_number] => 7/570521 [patent_app_country] => US [patent_app_date] => 1990-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 6160 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287529.pdf [firstpage_image] =>[orig_patent_app_number] => 570521 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/570521
Method for estimating solutions to finite element equations by generating pyramid representations, multiplying to generate weight pyramids, and collapsing the weighted pyramids Aug 20, 1990 Issued
Array ( [id] => 2933969 [patent_doc_number] => 05201039 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-06 [patent_title] => 'Multiple address-space data processor with addressable register and context switching' [patent_app_type] => 1 [patent_app_number] => 7/569758 [patent_app_country] => US [patent_app_date] => 1990-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 213 [patent_figures_cnt] => 397 [patent_no_of_words] => 93638 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/201/05201039.pdf [firstpage_image] =>[orig_patent_app_number] => 569758 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/569758
Multiple address-space data processor with addressable register and context switching Aug 19, 1990 Issued
Array ( [id] => 3025345 [patent_doc_number] => 05276899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Multi processor sorting network for sorting while transmitting concurrently presented messages by message content to deliver a highest priority message' [patent_app_type] => 1 [patent_app_number] => 7/565818 [patent_app_country] => US [patent_app_date] => 1990-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 36 [patent_no_of_words] => 28340 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276899.pdf [firstpage_image] =>[orig_patent_app_number] => 565818 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/565818
Multi processor sorting network for sorting while transmitting concurrently presented messages by message content to deliver a highest priority message Aug 9, 1990 Issued
Array ( [id] => 3035719 [patent_doc_number] => 05327568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-05 [patent_title] => 'Apparatus for supporting graphic data driven program development and for displaying instruction execution results superimposed on the graphic program' [patent_app_type] => 1 [patent_app_number] => 7/559240 [patent_app_country] => US [patent_app_date] => 1990-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 10442 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 452 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/327/05327568.pdf [firstpage_image] =>[orig_patent_app_number] => 559240 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/559240
Apparatus for supporting graphic data driven program development and for displaying instruction execution results superimposed on the graphic program Jul 29, 1990 Issued
07/565311 DOCUMENT RETRIEVAL SYSTEM INVOLVING RANKING OF DOCUMENTS IN ACCORDANCE WITH A DEGREE TO WHICH THE DOCUMENTS FULFILL A RETRIEVAL CONDITION CORRESPONDING TO A USER ENTRY Jul 26, 1990 Abandoned
Array ( [id] => 3078192 [patent_doc_number] => 05295261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-15 [patent_title] => 'Hybrid database structure linking navigational fields having a hierarchial database structure to informational fields having a relational database structure' [patent_app_type] => 1 [patent_app_number] => 7/558618 [patent_app_country] => US [patent_app_date] => 1990-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7106 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 547 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/295/05295261.pdf [firstpage_image] =>[orig_patent_app_number] => 558618 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/558618
Hybrid database structure linking navigational fields having a hierarchial database structure to informational fields having a relational database structure Jul 26, 1990 Issued
Array ( [id] => 3025327 [patent_doc_number] => 05276898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'System for selectively compressing data frames based upon a current processor work load identifying whether the processor is too busy to perform the compression' [patent_app_type] => 1 [patent_app_number] => 7/558021 [patent_app_country] => US [patent_app_date] => 1990-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4639 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276898.pdf [firstpage_image] =>[orig_patent_app_number] => 558021 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/558021
System for selectively compressing data frames based upon a current processor work load identifying whether the processor is too busy to perform the compression Jul 25, 1990 Issued
Array ( [id] => 3033092 [patent_doc_number] => 05303381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-12 [patent_title] => 'Method and apparatus for sorting sequential input signals by concurrently comparing successive input signals among signals in first and second memory sections' [patent_app_type] => 1 [patent_app_number] => 7/554384 [patent_app_country] => US [patent_app_date] => 1990-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9603 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/303/05303381.pdf [firstpage_image] =>[orig_patent_app_number] => 554384 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/554384
Method and apparatus for sorting sequential input signals by concurrently comparing successive input signals among signals in first and second memory sections Jul 18, 1990 Issued
Array ( [id] => 2992525 [patent_doc_number] => 05253350 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Method of combining lower order and translated upper order bits to address ROM within a range reserved for other devices' [patent_app_type] => 1 [patent_app_number] => 7/555778 [patent_app_country] => US [patent_app_date] => 1990-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2389 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/253/05253350.pdf [firstpage_image] =>[orig_patent_app_number] => 555778 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/555778
Method of combining lower order and translated upper order bits to address ROM within a range reserved for other devices Jul 18, 1990 Issued
Array ( [id] => 2872629 [patent_doc_number] => 05167022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests' [patent_app_type] => 1 [patent_app_number] => 7/552341 [patent_app_country] => US [patent_app_date] => 1990-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3734 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/167/05167022.pdf [firstpage_image] =>[orig_patent_app_number] => 552341 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/552341
Multiprocessor bus locking system with a winning processor broadcasting an ownership signal causing all processors to halt their requests Jul 15, 1990 Issued
07/551784 SYSTEM FOR COLLECTING MANAGEMENT INFORMATION IN A COMPUTER NETWORK Jul 11, 1990 Abandoned
Array ( [id] => 3108370 [patent_doc_number] => 05291610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-01 [patent_title] => 'Microcode sequencer changing states in response to an external gating input level change upon the occurrence of a WAIT instruction' [patent_app_type] => 1 [patent_app_number] => 7/551798 [patent_app_country] => US [patent_app_date] => 1990-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7686 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/291/05291610.pdf [firstpage_image] =>[orig_patent_app_number] => 551798 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/551798
Microcode sequencer changing states in response to an external gating input level change upon the occurrence of a WAIT instruction Jul 11, 1990 Issued
07/548413 ELECTRONIC APPARATUS Jul 4, 1990 Abandoned
07/546589 METHOD FOR CONTROLLING COMMUNICATION BETWEEN COMPUTERS Jun 28, 1990 Abandoned
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