Laura A Auer
Examiner (ID: 13665, Phone: (571)270-5669 , Office: P/1783 )
Most Active Art Unit | 1783 |
Art Unit(s) | 1783 |
Total Applications | 502 |
Issued Applications | 197 |
Pending Applications | 46 |
Abandoned Applications | 259 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3879372
[patent_doc_number] => 05794057
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-11
[patent_title] => 'Circuit for reducing audio amplifier noise during powering on and off'
[patent_app_type] => 1
[patent_app_number] => 8/818346
[patent_app_country] => US
[patent_app_date] => 1997-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3837
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[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/794/05794057.pdf
[firstpage_image] =>[orig_patent_app_number] => 818346
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/818346 | Circuit for reducing audio amplifier noise during powering on and off | Mar 14, 1997 | Issued |
Array
(
[id] => 4085079
[patent_doc_number] => 06009489
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-28
[patent_title] => 'Method and system for supporting non-deterministic burst lengths in a memory system employing extended data out(EDO)DRAM'
[patent_app_type] => 1
[patent_app_number] => 8/818235
[patent_app_country] => US
[patent_app_date] => 1997-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4518
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[patent_words_short_claim] => 140
[patent_maintenance] => 1
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[pdf_file] => patents/06/009/06009489.pdf
[firstpage_image] =>[orig_patent_app_number] => 818235
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/818235 | Method and system for supporting non-deterministic burst lengths in a memory system employing extended data out(EDO)DRAM | Mar 13, 1997 | Issued |
Array
(
[id] => 3973286
[patent_doc_number] => 05978881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-02
[patent_title] => 'Scalable switcher with detachably securable frame adapter cards for routing audio and video signals'
[patent_app_type] => 1
[patent_app_number] => 8/803784
[patent_app_country] => US
[patent_app_date] => 1997-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3456
[patent_no_of_claims] => 21
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[pdf_file] => patents/05/978/05978881.pdf
[firstpage_image] =>[orig_patent_app_number] => 803784
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/803784 | Scalable switcher with detachably securable frame adapter cards for routing audio and video signals | Feb 23, 1997 | Issued |
Array
(
[id] => 4100384
[patent_doc_number] => 06055640
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Power estimation of a microprocessor based on power consumption of memory'
[patent_app_type] => 1
[patent_app_number] => 8/797783
[patent_app_country] => US
[patent_app_date] => 1997-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6536
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/797783 | Power estimation of a microprocessor based on power consumption of memory | Feb 6, 1997 | Issued |
Array
(
[id] => 4132998
[patent_doc_number] => 06047347
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-04
[patent_title] => 'Computer system with programmable bus size'
[patent_app_type] => 1
[patent_app_number] => 8/816944
[patent_app_country] => US
[patent_app_date] => 1997-02-04
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[firstpage_image] =>[orig_patent_app_number] => 816944
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/816944 | Computer system with programmable bus size | Feb 3, 1997 | Issued |
Array
(
[id] => 4026319
[patent_doc_number] => 05941989
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-24
[patent_title] => 'Apparatus for indicating power-consumption status in a computer system'
[patent_app_type] => 1
[patent_app_number] => 8/779578
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[patent_app_date] => 1997-01-07
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[pdf_file] => patents/05/941/05941989.pdf
[firstpage_image] =>[orig_patent_app_number] => 779578
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/779578 | Apparatus for indicating power-consumption status in a computer system | Jan 6, 1997 | Issued |
Array
(
[id] => 3926050
[patent_doc_number] => 06002675
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-12-14
[patent_title] => 'Method and apparatus for controlling transmission of data over a network'
[patent_app_type] => 1
[patent_app_number] => 8/779877
[patent_app_country] => US
[patent_app_date] => 1997-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[patent_no_of_words] => 21332
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[pdf_file] => patents/06/002/06002675.pdf
[firstpage_image] =>[orig_patent_app_number] => 779877
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/779877 | Method and apparatus for controlling transmission of data over a network | Jan 5, 1997 | Issued |
Array
(
[id] => 3916328
[patent_doc_number] => 05951689
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Microprocessor power control system'
[patent_app_type] => 1
[patent_app_number] => 8/775629
[patent_app_country] => US
[patent_app_date] => 1996-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2267
[patent_no_of_claims] => 9
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[pdf_file] => patents/05/951/05951689.pdf
[firstpage_image] =>[orig_patent_app_number] => 775629
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/775629 | Microprocessor power control system | Dec 30, 1996 | Issued |
Array
(
[id] => 4029938
[patent_doc_number] => 05907689
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-25
[patent_title] => 'Master-target based arbitration priority'
[patent_app_type] => 1
[patent_app_number] => 8/777826
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/907/05907689.pdf
[firstpage_image] =>[orig_patent_app_number] => 777826
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777826 | Master-target based arbitration priority | Dec 30, 1996 | Issued |
Array
(
[id] => 4031766
[patent_doc_number] => 05881297
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Apparatus and method for controlling clocking frequency in an integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/775783
[patent_app_country] => US
[patent_app_date] => 1996-12-31
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[pdf_file] => patents/05/881/05881297.pdf
[firstpage_image] =>[orig_patent_app_number] => 775783
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/775783 | Apparatus and method for controlling clocking frequency in an integrated circuit | Dec 30, 1996 | Issued |
Array
(
[id] => 4268826
[patent_doc_number] => 06138192
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Delivering a request to write or read data before delivering an earlier write request'
[patent_app_type] => 1
[patent_app_number] => 8/777575
[patent_app_country] => US
[patent_app_date] => 1996-12-31
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[pdf_file] => patents/06/138/06138192.pdf
[firstpage_image] =>[orig_patent_app_number] => 777575
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777575 | Delivering a request to write or read data before delivering an earlier write request | Dec 30, 1996 | Issued |
Array
(
[id] => 4008174
[patent_doc_number] => 05892929
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-06
[patent_title] => 'Avoiding non-unique identifiers for bus devices'
[patent_app_type] => 1
[patent_app_number] => 8/777230
[patent_app_country] => US
[patent_app_date] => 1996-12-30
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[pdf_file] => patents/05/892/05892929.pdf
[firstpage_image] =>[orig_patent_app_number] => 777230
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777230 | Avoiding non-unique identifiers for bus devices | Dec 29, 1996 | Issued |
Array
(
[id] => 3967012
[patent_doc_number] => 05983304
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[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Buffer flush controller of a peripheral component interconnect-peripheral component interconnect bridge'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/759880 | Buffer flush controller of a peripheral component interconnect-peripheral component interconnect bridge | Dec 2, 1996 | Issued |
Array
(
[id] => 3998024
[patent_doc_number] => 05862359
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[patent_issue_date] => 1999-01-19
[patent_title] => 'Data transfer bus including divisional buses connectable by bus switch circuit'
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Array
(
[id] => 4014517
[patent_doc_number] => 05923856
[patent_country] => US
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[patent_issue_date] => 1999-07-13
[patent_title] => 'Control system for coping with bus extension in controlling a communication apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/757377 | Control system for coping with bus extension in controlling a communication apparatus | Nov 26, 1996 | Issued |
Array
(
[id] => 4008284
[patent_doc_number] => 05920709
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[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Bus interface for IDE device'
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[firstpage_image] =>[orig_patent_app_number] => 751681
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/751681 | Bus interface for IDE device | Nov 17, 1996 | Issued |
Array
(
[id] => 4037881
[patent_doc_number] => 05926640
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-20
[patent_title] => 'Skipping clock interrupts during system inactivity to reduce power consumption'
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Array
(
[id] => 4167643
[patent_doc_number] => 06065125
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[patent_issue_date] => 2000-05-16
[patent_title] => 'SMM power management circuits, systems, and methods'
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Array
(
[id] => 4031809
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Array
(
[id] => 4064770
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[pdf_file] => patents/05/870/05870573.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/733483 | Transistor switch used to isolate bus devices and/or translate bus voltage levels | Oct 17, 1996 | Issued |