Application number | Title of the application | Filing Date | Status |
---|
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Array
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[patent_issue_date] => 1999-08-24
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Array
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[patent_doc_number] => 05881247
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'System having a plurality of frame bytes capable of identifying addressed recipients and assert a busy signal onto the backplane bus to forthrightly abort the message transfer'
[patent_app_type] => 1
[patent_app_number] => 8/537066
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Array
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[patent_issue_date] => 1999-02-02
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Array
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[patent_kind] => NA
[patent_issue_date] => 1999-11-23
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Array
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[patent_kind] => NA
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Array
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[patent_kind] => NA
[patent_issue_date] => 1998-09-08
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[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/538981 | Method and system for interleaving the distribution of data segments from different logical volumes on a single physical drive | Oct 4, 1995 | Issued |
Array
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[id] => 3806933
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[patent_kind] => NA
[patent_issue_date] => 1998-11-24
[patent_title] => 'Apparatus for effecting port switching of fibre channel loops'
[patent_app_type] => 1
[patent_app_number] => 8/536686
[patent_app_country] => US
[patent_app_date] => 1995-09-29
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Array
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[patent_kind] => NA
[patent_issue_date] => 1999-01-12
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[patent_app_type] => 1
[patent_app_number] => 8/536275
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[firstpage_image] =>[orig_patent_app_number] => 536275
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Array
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[id] => 3897258
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Array
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[patent_kind] => NA
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Array
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[id] => 3849349
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[patent_kind] => NA
[patent_issue_date] => 1998-06-02
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[firstpage_image] =>[orig_patent_app_number] => 523385
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/523385 | Method and apparatus for dynamically deferring transactions | Sep 4, 1995 | Issued |
08/518483 | DIGITAL GATE COMPUTER BUS | Aug 22, 1995 | Abandoned |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/493574 | Override signal for forcing a powerdown of a flash memory | Jun 21, 1995 | Issued |
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Array
(
[id] => 3802408
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[patent_kind] => NA
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/446390 | Add-in board with programmable configuration registers for use in PCI bus computers | May 21, 1995 | Issued |
08/421202 | DUAL ARBITERS FOR ARBITRATING ACCESS TO A FIRST AND SECOND BUS IN A COMPUTER SYSTEM HAVING BUS MASTERS ON EACH BUS | Apr 12, 1995 | Abandoned |