Search

Laura Mary Menz

Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2324
Issued Applications
1995
Pending Applications
138
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6141731 [patent_doc_number] => 20020001885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Semiconductor processing methods of forming integrated circuitry, forming conductive lines, forming a conductive grid, forming a conductive network, forming an electrical interconnection to a node location, Forming an electrical interconnection with a transistor source/drain region, and integrated circuitry' [patent_app_type] => new [patent_app_number] => 09/848825 [patent_app_country] => US [patent_app_date] => 2001-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4906 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20020001885.pdf [firstpage_image] =>[orig_patent_app_number] => 09848825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/848825
Semiconductor processing methods of forming a conductive grid May 2, 2001 Issued
Array ( [id] => 7000603 [patent_doc_number] => 20010053585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Cleaning process for substrate surface' [patent_app_type] => new [patent_app_number] => 09/846255 [patent_app_country] => US [patent_app_date] => 2001-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 10461 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20010053585.pdf [firstpage_image] =>[orig_patent_app_number] => 09846255 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/846255
Cleaning process for substrate surface May 1, 2001 Abandoned
Array ( [id] => 6897397 [patent_doc_number] => 20010045562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Group III nitride compound semiconductor light-emitting device' [patent_app_type] => new [patent_app_number] => 09/845336 [patent_app_country] => US [patent_app_date] => 2001-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9678 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20010045562.pdf [firstpage_image] =>[orig_patent_app_number] => 09845336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/845336
Group III nitride compound semiconductor light-emitting device Apr 30, 2001 Issued
Array ( [id] => 6502326 [patent_doc_number] => 20020025615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => new [patent_app_number] => 09/840167 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5644 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20020025615.pdf [firstpage_image] =>[orig_patent_app_number] => 09840167 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840167
Semiconductor device and method for producing the same Apr 23, 2001 Issued
Array ( [id] => 1594417 [patent_doc_number] => 06383881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for using thin spacers and oxidation in gate oxides' [patent_app_type] => B1 [patent_app_number] => 09/840855 [patent_app_country] => US [patent_app_date] => 2001-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4254 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383881.pdf [firstpage_image] =>[orig_patent_app_number] => 09840855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840855
Method for using thin spacers and oxidation in gate oxides Apr 23, 2001 Issued
Array ( [id] => 1202745 [patent_doc_number] => 06720273 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-13 [patent_title] => 'DEVICE AND METHOD FOR THE HIGH-FREQUENCY ETCHING OF A SUBSTRATE USING A PLASMA ETCHING INSTALLATION AND DEVICE AND METHOD FOR IGNITING A PLASMA AND FOR PULSING THE PLASMA OUT PUT OR ADJUSTING THE SAME UPWARDS' [patent_app_type] => B1 [patent_app_number] => 09/763138 [patent_app_country] => US [patent_app_date] => 2001-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 4539 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720273.pdf [firstpage_image] =>[orig_patent_app_number] => 09763138 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/763138
DEVICE AND METHOD FOR THE HIGH-FREQUENCY ETCHING OF A SUBSTRATE USING A PLASMA ETCHING INSTALLATION AND DEVICE AND METHOD FOR IGNITING A PLASMA AND FOR PULSING THE PLASMA OUT PUT OR ADJUSTING THE SAME UPWARDS Apr 19, 2001 Issued
Array ( [id] => 6901529 [patent_doc_number] => 20010023112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'Shallow trench isolation on a silicon substrate using nitrogen implant into the side wall' [patent_app_type] => new [patent_app_number] => 09/837136 [patent_app_country] => US [patent_app_date] => 2001-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2833 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023112.pdf [firstpage_image] =>[orig_patent_app_number] => 09837136 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/837136
Shallow trench isolation on a silicon substrate using nitrogen implant into the side wall Apr 17, 2001 Issued
Array ( [id] => 1477596 [patent_doc_number] => 06344376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-02-05 [patent_title] => 'Method of forming a thin film transistor' [patent_app_type] => B2 [patent_app_number] => 09/837645 [patent_app_country] => US [patent_app_date] => 2001-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3262 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344376.pdf [firstpage_image] =>[orig_patent_app_number] => 09837645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/837645
Method of forming a thin film transistor Apr 16, 2001 Issued
Array ( [id] => 6961316 [patent_doc_number] => 20010012664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry' [patent_app_type] => new [patent_app_number] => 09/834660 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2559 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20010012664.pdf [firstpage_image] =>[orig_patent_app_number] => 09834660 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834660
Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry Apr 11, 2001 Abandoned
Array ( [id] => 1507282 [patent_doc_number] => 06440784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-27 [patent_title] => 'Thin film transistor and a fabricating method thereof' [patent_app_type] => B2 [patent_app_number] => 09/828156 [patent_app_country] => US [patent_app_date] => 2001-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5580 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440784.pdf [firstpage_image] =>[orig_patent_app_number] => 09828156 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/828156
Thin film transistor and a fabricating method thereof Apr 8, 2001 Issued
Array ( [id] => 1364192 [patent_doc_number] => 06573550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Semiconductor with high-voltage components and low-voltage components on a shared die' [patent_app_type] => B2 [patent_app_number] => 09/827399 [patent_app_country] => US [patent_app_date] => 2001-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7055 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573550.pdf [firstpage_image] =>[orig_patent_app_number] => 09827399 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827399
Semiconductor with high-voltage components and low-voltage components on a shared die Apr 5, 2001 Issued
Array ( [id] => 6947944 [patent_doc_number] => 20010021579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-13 [patent_title] => 'Semiconductor processing method of forming a conductive line, and buried bit line memory circuitry' [patent_app_type] => new [patent_app_number] => 09/827973 [patent_app_country] => US [patent_app_date] => 2001-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3745 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20010021579.pdf [firstpage_image] =>[orig_patent_app_number] => 09827973 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827973
Semiconductor processing method of forming a conductive line, and buried bit line memory circuitry Apr 4, 2001 Issued
Array ( [id] => 5901005 [patent_doc_number] => 20020140031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Strained silicon on insulator structures' [patent_app_type] => new [patent_app_number] => 09/823855 [patent_app_country] => US [patent_app_date] => 2001-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3237 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140031.pdf [firstpage_image] =>[orig_patent_app_number] => 09823855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/823855
Strained silicon on insulator structures Mar 30, 2001 Issued
Array ( [id] => 1485143 [patent_doc_number] => 06365444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-02 [patent_title] => 'Process for forming polycrystalline thin film transistor liquid crystal display' [patent_app_type] => B2 [patent_app_number] => 09/812106 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 2749 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365444.pdf [firstpage_image] =>[orig_patent_app_number] => 09812106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/812106
Process for forming polycrystalline thin film transistor liquid crystal display Mar 18, 2001 Issued
Array ( [id] => 5844500 [patent_doc_number] => 20020132395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Body contact in SOI devices by electrically weakening the oxide under the body' [patent_app_type] => new [patent_app_number] => 09/810236 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1466 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132395.pdf [firstpage_image] =>[orig_patent_app_number] => 09810236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/810236
Body contact in SOI devices by electrically weakening the oxide under the body Mar 15, 2001 Abandoned
Array ( [id] => 1477995 [patent_doc_number] => 06451635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-17 [patent_title] => 'Photolithography system and a method for fabricating a thin film transistor array substrate using the same' [patent_app_type] => B2 [patent_app_number] => 09/804056 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 8907 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/451/06451635.pdf [firstpage_image] =>[orig_patent_app_number] => 09804056 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804056
Photolithography system and a method for fabricating a thin film transistor array substrate using the same Mar 12, 2001 Issued
Array ( [id] => 1165303 [patent_doc_number] => 06756273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Semiconductor component and method of manufacturing' [patent_app_type] => B2 [patent_app_number] => 09/802726 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5953 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/756/06756273.pdf [firstpage_image] =>[orig_patent_app_number] => 09802726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/802726
Semiconductor component and method of manufacturing Mar 11, 2001 Issued
Array ( [id] => 1216461 [patent_doc_number] => 06706603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method of forming a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/792266 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3218 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706603.pdf [firstpage_image] =>[orig_patent_app_number] => 09792266 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/792266
Method of forming a semiconductor device Feb 22, 2001 Issued
Array ( [id] => 6880246 [patent_doc_number] => 20010031533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/789055 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6062 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031533.pdf [firstpage_image] =>[orig_patent_app_number] => 09789055 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789055
Semiconductor device and method of manufacturing the same Feb 19, 2001 Issued
Array ( [id] => 6880231 [patent_doc_number] => 20010031518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Soi semiconductor integrated circuit for eliminating floating body effects in soi mosfets and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/782116 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8467 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031518.pdf [firstpage_image] =>[orig_patent_app_number] => 09782116 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782116
SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same Feb 12, 2001 Issued
Menu