Laura Mary Menz

Array ( [id] => 6890127 [patent_doc_number] => 20010007358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-12 [patent_title] => 'Liquid crystal display and manufacturing process of thin film transistor used therein' [patent_app_type] => new-utility [patent_app_number] => 09/778786 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3262 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20010007358.pdf [firstpage_image] =>[orig_patent_app_number] => 09778786 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6960460 [patent_doc_number] => 20010012224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-09 [patent_title] => 'Rugged metal electrodes for metal-insulator-metal capacitors' [patent_app_type] => new [patent_app_number] => 09/770540 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20010012224.pdf [firstpage_image] =>[orig_patent_app_number] => 09770540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1093831 [patent_doc_number] => 06825488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 09/769765 [patent_app_country] => US [patent_app_date] => 2001-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 16771 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825488.pdf [firstpage_image] =>[orig_patent_app_number] => 09769765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5986279 [patent_doc_number] => 20020098637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'High voltage laterally diffused metal oxide semiconductor with improved on resistance and method of manufacture' [patent_app_type] => new [patent_app_number] => 09/766965 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2429 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098637.pdf [firstpage_image] =>[orig_patent_app_number] => 09766965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6901515 [patent_doc_number] => 20010023098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-20 [patent_title] => 'Semiconductor devices and methods for manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/759666 [patent_app_country] => US [patent_app_date] => 2001-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10923 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023098.pdf [firstpage_image] =>[orig_patent_app_number] => 09759666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5951478 [patent_doc_number] => 20020006704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'Process for forming gate oxide layer' [patent_app_type] => new [patent_app_number] => 09/759436 [patent_app_country] => US [patent_app_date] => 2001-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2045 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20020006704.pdf [firstpage_image] =>[orig_patent_app_number] => 09759436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 650966 [patent_doc_number] => 07112543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'Methods of forming assemblies comprising silicon-doped aluminum oxide' [patent_app_type] => utility [patent_app_number] => 09/754926 [patent_app_country] => US [patent_app_date] => 2001-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3887 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/112/07112543.pdf [firstpage_image] =>[orig_patent_app_number] => 09754926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1248254 [patent_doc_number] => 06673702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method for producing a semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/748436 [patent_app_country] => US [patent_app_date] => 2000-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 7789 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673702.pdf [firstpage_image] =>[orig_patent_app_number] => 09748436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1285160 [patent_doc_number] => 06638832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Elimination of narrow device width effects in complementary metal oxide semiconductor (CMOS) devices' [patent_app_type] => B2 [patent_app_number] => 09/741028 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3270 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/638/06638832.pdf [firstpage_image] =>[orig_patent_app_number] => 09741028 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1490247 [patent_doc_number] => 06417078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Implantation process using sub-stoichiometric, oxygen doses at different energies' [patent_app_type] => B1 [patent_app_number] => 09/748526 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417078.pdf [firstpage_image] =>[orig_patent_app_number] => 09748526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1332397 [patent_doc_number] => 06596609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method of fabricating a feature in an integrated circuit using two edge definition layers and a spacer' [patent_app_type] => B2 [patent_app_number] => 09/740782 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 32 [patent_no_of_words] => 3846 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596609.pdf [firstpage_image] =>[orig_patent_app_number] => 09740782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1212676 [patent_doc_number] => 06709906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Method for producing semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/739268 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 63 [patent_no_of_words] => 12531 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709906.pdf [firstpage_image] =>[orig_patent_app_number] => 09739268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6902005 [patent_doc_number] => 20010000914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-10 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => new-utility [patent_app_number] => 09/736205 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20010000914.pdf [firstpage_image] =>[orig_patent_app_number] => 09736205 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1474425 [patent_doc_number] => 06387738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method for manufacturing a thin film transistor' [patent_app_type] => B2 [patent_app_number] => 09/731756 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2139 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387738.pdf [firstpage_image] =>[orig_patent_app_number] => 09731756 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1196662 [patent_doc_number] => 06727149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Method of making a hybrid SOI device that suppresses floating body effects' [patent_app_type] => B1 [patent_app_number] => 09/732976 [patent_app_country] => US [patent_app_date] => 2000-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1766 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/727/06727149.pdf [firstpage_image] =>[orig_patent_app_number] => 09732976 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5825852 [patent_doc_number] => 20020066900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-06 [patent_title] => 'Thin film transistors with self-aligned transparent pixel electrode' [patent_app_type] => new [patent_app_number] => 09/730218 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4476 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20020066900.pdf [firstpage_image] =>[orig_patent_app_number] => 09730218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1310402 [patent_doc_number] => 06613613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-02 [patent_title] => 'Thin film type monolithic semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/726336 [patent_app_country] => US [patent_app_date] => 2000-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 5629 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/613/06613613.pdf [firstpage_image] =>[orig_patent_app_number] => 09726336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6874968 [patent_doc_number] => 20010000034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-03-15 [patent_title] => 'Damascene process with anti-reflection coating' [patent_app_type] => new-utility [patent_app_number] => 09/725936 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20010000034.pdf [firstpage_image] =>[orig_patent_app_number] => 09725936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1539116 [patent_doc_number] => 06490301 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Laser drive device' [patent_app_type] => B1 [patent_app_number] => 09/717141 [patent_app_country] => US [patent_app_date] => 2000-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7052 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490301.pdf [firstpage_image] =>[orig_patent_app_number] => 09717141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1386501 [patent_doc_number] => 06555872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Trench gate fermi-threshold field effect transistors' [patent_app_type] => B1 [patent_app_number] => 09/718816 [patent_app_country] => US [patent_app_date] => 2000-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 40 [patent_no_of_words] => 17357 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/555/06555872.pdf [firstpage_image] =>[orig_patent_app_number] => 09718816 [rel_patent_id] =>[rel_patent_doc_number] =>)