
Laura Mary Menz
Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2324 |
| Issued Applications | 1995 |
| Pending Applications | 138 |
| Abandoned Applications | 216 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6242478
[patent_doc_number] => 20020045321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-18
[patent_title] => 'PROCESS FOR FABRICATING A SEMICONDUCTOR COMPONENT'
[patent_app_type] => new
[patent_app_number] => 09/374844
[patent_app_country] => US
[patent_app_date] => 1999-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1978
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20020045321.pdf
[firstpage_image] =>[orig_patent_app_number] => 09374844
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/374844 | Process for fabricating a semiconductor component | Aug 15, 1999 | Issued |
Array
(
[id] => 4390578
[patent_doc_number] => 06278327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Negative voltage detector'
[patent_app_type] => 1
[patent_app_number] => 9/374473
[patent_app_country] => US
[patent_app_date] => 1999-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2700
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/278/06278327.pdf
[firstpage_image] =>[orig_patent_app_number] => 374473
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/374473 | Negative voltage detector | Aug 12, 1999 | Issued |
Array
(
[id] => 4350138
[patent_doc_number] => 06291284
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-18
[patent_title] => 'Method of fabricating semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/372104
[patent_app_country] => US
[patent_app_date] => 1999-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 32
[patent_no_of_words] => 8450
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/291/06291284.pdf
[firstpage_image] =>[orig_patent_app_number] => 372104
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/372104 | Method of fabricating semiconductor device | Aug 10, 1999 | Issued |
Array
(
[id] => 4343474
[patent_doc_number] => 06284568
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-04
[patent_title] => 'Method and system for producing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/365230
[patent_app_country] => US
[patent_app_date] => 1999-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 26
[patent_no_of_words] => 7597
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/284/06284568.pdf
[firstpage_image] =>[orig_patent_app_number] => 365230
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/365230 | Method and system for producing semiconductor device | Jul 29, 1999 | Issued |
Array
(
[id] => 6224681
[patent_doc_number] => 20020004289
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-10
[patent_title] => 'SEMICONDUCTOR DEVICE MANUFACTURING METHOD'
[patent_app_type] => new
[patent_app_number] => 09/362055
[patent_app_country] => US
[patent_app_date] => 1999-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6656
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20020004289.pdf
[firstpage_image] =>[orig_patent_app_number] => 09362055
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/362055 | Semiconductor device manufacturing method | Jul 27, 1999 | Issued |
Array
(
[id] => 1463560
[patent_doc_number] => 06350977
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-02-26
[patent_title] => 'Pattern distortion detecting method and apparatus and recording medium for pattern distortion detection'
[patent_app_type] => B2
[patent_app_number] => 09/360640
[patent_app_country] => US
[patent_app_date] => 1999-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 27
[patent_no_of_words] => 9510
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/350/06350977.pdf
[firstpage_image] =>[orig_patent_app_number] => 09360640
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/360640 | Pattern distortion detecting method and apparatus and recording medium for pattern distortion detection | Jul 25, 1999 | Issued |
Array
(
[id] => 4408117
[patent_doc_number] => 06300181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-09
[patent_title] => 'Process for manufacturing an electronic device including MOS transistors with salicided junctions and non-salicided resistors'
[patent_app_type] => 1
[patent_app_number] => 9/358075
[patent_app_country] => US
[patent_app_date] => 1999-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 2126
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/300/06300181.pdf
[firstpage_image] =>[orig_patent_app_number] => 358075
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/358075 | Process for manufacturing an electronic device including MOS transistors with salicided junctions and non-salicided resistors | Jul 20, 1999 | Issued |
Array
(
[id] => 4274905
[patent_doc_number] => 06281044
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-28
[patent_title] => 'Method and system for fabricating semiconductor components'
[patent_app_type] => 1
[patent_app_number] => 9/356267
[patent_app_country] => US
[patent_app_date] => 1999-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 6676
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/281/06281044.pdf
[firstpage_image] =>[orig_patent_app_number] => 356267
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/356267 | Method and system for fabricating semiconductor components | Jul 15, 1999 | Issued |
Array
(
[id] => 4310476
[patent_doc_number] => 06316333
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Method for obtaining a thin film in particular semiconductor, comprising a protected ion zone and involving an ion implantation'
[patent_app_type] => 1
[patent_app_number] => 9/341555
[patent_app_country] => US
[patent_app_date] => 1999-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3398
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/316/06316333.pdf
[firstpage_image] =>[orig_patent_app_number] => 341555
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/341555 | Method for obtaining a thin film in particular semiconductor, comprising a protected ion zone and involving an ion implantation | Jul 13, 1999 | Issued |
Array
(
[id] => 4356893
[patent_doc_number] => 06190951
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-20
[patent_title] => 'Method for manufacturing a liquid crystal display apparatus'
[patent_app_type] => 1
[patent_app_number] => 9/346725
[patent_app_country] => US
[patent_app_date] => 1999-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2094
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/190/06190951.pdf
[firstpage_image] =>[orig_patent_app_number] => 346725
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/346725 | Method for manufacturing a liquid crystal display apparatus | Jul 1, 1999 | Issued |
Array
(
[id] => 4417306
[patent_doc_number] => 06194289
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'SOI device and method of isolation thereof'
[patent_app_type] => 1
[patent_app_number] => 9/343066
[patent_app_country] => US
[patent_app_date] => 1999-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 3959
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/194/06194289.pdf
[firstpage_image] =>[orig_patent_app_number] => 343066
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/343066 | SOI device and method of isolation thereof | Jun 28, 1999 | Issued |
Array
(
[id] => 4385371
[patent_doc_number] => 06303954
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Semiconductor device with a high-voltage component in semiconductor on insulator'
[patent_app_type] => 1
[patent_app_number] => 9/330783
[patent_app_country] => US
[patent_app_date] => 1999-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 7690
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/303/06303954.pdf
[firstpage_image] =>[orig_patent_app_number] => 330783
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/330783 | Semiconductor device with a high-voltage component in semiconductor on insulator | Jun 10, 1999 | Issued |
| 09/329705 | SELF-ALIGNED BURIED STRAP FOR VERTICAL TRANSISTORS | Jun 9, 1999 | Abandoned |
Array
(
[id] => 5870761
[patent_doc_number] => 20020047217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'METALLIC UNDERCOATING FOR SOLDER MATERIALS'
[patent_app_type] => new
[patent_app_number] => 09/325494
[patent_app_country] => US
[patent_app_date] => 1999-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1814
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20020047217.pdf
[firstpage_image] =>[orig_patent_app_number] => 09325494
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/325494 | METALLIC UNDERCOATING FOR SOLDER MATERIALS | May 27, 1999 | Abandoned |
Array
(
[id] => 1531685
[patent_doc_number] => 06410210
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-25
[patent_title] => 'Semiconductor blocking layer for preventing UV radiation damage to MOS gate oxides'
[patent_app_type] => B1
[patent_app_number] => 09/315596
[patent_app_country] => US
[patent_app_date] => 1999-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 3302
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/410/06410210.pdf
[firstpage_image] =>[orig_patent_app_number] => 09315596
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/315596 | Semiconductor blocking layer for preventing UV radiation damage to MOS gate oxides | May 19, 1999 | Issued |
Array
(
[id] => 4129855
[patent_doc_number] => 06033941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Method of forming a thin film transistor with asymmetrically arranged gate electrode and offset region'
[patent_app_type] => 1
[patent_app_number] => 9/305316
[patent_app_country] => US
[patent_app_date] => 1999-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 2131
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/033/06033941.pdf
[firstpage_image] =>[orig_patent_app_number] => 305316
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/305316 | Method of forming a thin film transistor with asymmetrically arranged gate electrode and offset region | May 4, 1999 | Issued |
Array
(
[id] => 4215556
[patent_doc_number] => 06087244
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Methods of forming semiconductor-on-insulator devices including buried layers of opposite conductivity type'
[patent_app_type] => 1
[patent_app_number] => 9/300115
[patent_app_country] => US
[patent_app_date] => 1999-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 2353
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087244.pdf
[firstpage_image] =>[orig_patent_app_number] => 300115
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/300115 | Methods of forming semiconductor-on-insulator devices including buried layers of opposite conductivity type | Apr 26, 1999 | Issued |
Array
(
[id] => 749793
[patent_doc_number] => 07022623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-04
[patent_title] => 'Method of fabricating a semiconductor device with a dielectric film using a wet oxidation with steam process'
[patent_app_type] => utility
[patent_app_number] => 09/296835
[patent_app_country] => US
[patent_app_date] => 1999-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3580
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/022/07022623.pdf
[firstpage_image] =>[orig_patent_app_number] => 09296835
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/296835 | Method of fabricating a semiconductor device with a dielectric film using a wet oxidation with steam process | Apr 21, 1999 | Issued |
Array
(
[id] => 1549890
[patent_doc_number] => 06346486
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-02-12
[patent_title] => 'Transistor device and method of forming the same'
[patent_app_type] => B2
[patent_app_number] => 09/295398
[patent_app_country] => US
[patent_app_date] => 1999-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 10
[patent_no_of_words] => 3920
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/346/06346486.pdf
[firstpage_image] =>[orig_patent_app_number] => 09295398
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/295398 | Transistor device and method of forming the same | Apr 20, 1999 | Issued |
Array
(
[id] => 4266629
[patent_doc_number] => 06306701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-23
[patent_title] => 'Self-aligned contact process'
[patent_app_type] => 1
[patent_app_number] => 9/294594
[patent_app_country] => US
[patent_app_date] => 1999-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2204
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/306/06306701.pdf
[firstpage_image] =>[orig_patent_app_number] => 294594
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/294594 | Self-aligned contact process | Apr 19, 1999 | Issued |