Search

Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17615414 [patent_doc_number] => 20220157694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MICRO THROUGH-SILICON VIA FOR TRANSISTOR DENSITY SCALING [patent_app_type] => utility [patent_app_number] => 17/587647 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17587647 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/587647
Micro through-silicon via for transistor density scaling Jan 27, 2022 Issued
Array ( [id] => 18891158 [patent_doc_number] => 11869937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor device and method of forming the semiconductor device [patent_app_type] => utility [patent_app_number] => 17/578891 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 56 [patent_no_of_words] => 7848 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578891
Semiconductor device and method of forming the semiconductor device Jan 18, 2022 Issued
Array ( [id] => 19552906 [patent_doc_number] => 12136619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Methods of manufacturing three-dimensional integrated circuit structures [patent_app_type] => utility [patent_app_number] => 17/578477 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 11381 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578477
Methods of manufacturing three-dimensional integrated circuit structures Jan 18, 2022 Issued
Array ( [id] => 19414714 [patent_doc_number] => 12080550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Method of manufacturing semiconductor device, substrate processing method, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 17/575854 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10799 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575854
Method of manufacturing semiconductor device, substrate processing method, substrate processing apparatus, and recording medium Jan 13, 2022 Issued
Array ( [id] => 18024325 [patent_doc_number] => 20220375824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => DIE, MEMORY AND METHOD OF MANUFACTURING DIE [patent_app_type] => utility [patent_app_number] => 17/647883 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647883
Die, memory and method of manufacturing die Jan 12, 2022 Issued
Array ( [id] => 18112938 [patent_doc_number] => 20230005818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING VIA STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/574902 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7156 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574902 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574902
Semiconductor device including via structure and method for manufacturing the same Jan 12, 2022 Issued
Array ( [id] => 18514641 [patent_doc_number] => 20230230901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => TSV and Backside Power Distribution Structure [patent_app_type] => utility [patent_app_number] => 17/572101 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572101
TSV and backside power distribution structure Jan 9, 2022 Issued
Array ( [id] => 19123527 [patent_doc_number] => 11967521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Integrated semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/568716 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568716
Integrated semiconductor device and method for manufacturing the same Jan 4, 2022 Issued
Array ( [id] => 18416039 [patent_doc_number] => 11670586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Semiconductor device with source resistor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/567786 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 8565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567786 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567786
Semiconductor device with source resistor and manufacturing method thereof Jan 2, 2022 Issued
Array ( [id] => 19428249 [patent_doc_number] => 12087683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Low-dispersion component in an electronic chip [patent_app_type] => utility [patent_app_number] => 17/566437 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2525 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566437
Low-dispersion component in an electronic chip Dec 29, 2021 Issued
Array ( [id] => 20416867 [patent_doc_number] => 12500162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Staggered vertically spaced integrated circuit line metallization with differential vias and metal-selective deposition [patent_app_type] => utility [patent_app_number] => 17/560085 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 991 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560085 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560085
STAGGERED VERTICALLY SPACED INTEGRATED CIRCUIT LINE METALLIZATION WITH DIFFERENTIAL VIAS & METAL-SELECTIVE DEPOSITION Dec 21, 2021 Issued
Array ( [id] => 20416867 [patent_doc_number] => 12500162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Staggered vertically spaced integrated circuit line metallization with differential vias and metal-selective deposition [patent_app_type] => utility [patent_app_number] => 17/560085 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 991 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560085 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560085
STAGGERED VERTICALLY SPACED INTEGRATED CIRCUIT LINE METALLIZATION WITH DIFFERENTIAL VIAS & METAL-SELECTIVE DEPOSITION Dec 21, 2021 Issued
Array ( [id] => 18456440 [patent_doc_number] => 20230197722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING EPITAXIAL SOURCE OR DRAIN REGION LATERAL ISOLATION [patent_app_type] => utility [patent_app_number] => 17/558026 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558026
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING EPITAXIAL SOURCE OR DRAIN REGION LATERAL ISOLATION Dec 20, 2021 Pending
Array ( [id] => 19980319 [patent_doc_number] => 12347807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Inorganic fill material for stacked die assembly [patent_app_type] => utility [patent_app_number] => 17/558265 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 2271 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558265
Inorganic fill material for stacked die assembly Dec 20, 2021 Issued
Array ( [id] => 18759862 [patent_doc_number] => 11810902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Semiconductor device with sidewall interconnection structure, method of manufacturing the same, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/548289 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 7045 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548289 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548289
Semiconductor device with sidewall interconnection structure, method of manufacturing the same, and electronic apparatus Dec 9, 2021 Issued
Array ( [id] => 18608172 [patent_doc_number] => 11749650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor device with sidewall interconnection structure, method of manufacturing the same, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/548298 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 40 [patent_no_of_words] => 7625 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548298 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548298
Semiconductor device with sidewall interconnection structure, method of manufacturing the same, and electronic apparatus Dec 9, 2021 Issued
Array ( [id] => 19094041 [patent_doc_number] => 11955508 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/546463 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 29 [patent_no_of_words] => 10536 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17546463 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/546463
Semiconductor device Dec 8, 2021 Issued
Array ( [id] => 19108673 [patent_doc_number] => 11961787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor device with sidewall interconnection structure and method for manufacturing the same, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/545676 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 5711 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545676
Semiconductor device with sidewall interconnection structure and method for manufacturing the same, and electronic apparatus Dec 7, 2021 Issued
Array ( [id] => 18646838 [patent_doc_number] => 11770930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Microelectronic devices including staircase structures, and related memory devices and electronic systems [patent_app_type] => utility [patent_app_number] => 17/456544 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 12854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456544 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456544
Microelectronic devices including staircase structures, and related memory devices and electronic systems Nov 23, 2021 Issued
Array ( [id] => 18639552 [patent_doc_number] => 11764174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/534419 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534419 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/534419
Semiconductor structure Nov 22, 2021 Issued
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