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Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18507593 [patent_doc_number] => 11705420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Multi-bump connection to interconnect structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/178460 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 7514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/178460
Multi-bump connection to interconnect structure and manufacturing method thereof Feb 17, 2021 Issued
Array ( [id] => 17847700 [patent_doc_number] => 11437084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Embedded ferroelectric memory cell [patent_app_type] => utility [patent_app_number] => 17/177627 [patent_app_country] => US [patent_app_date] => 2021-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 11487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177627 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177627
Embedded ferroelectric memory cell Feb 16, 2021 Issued
Array ( [id] => 18219510 [patent_doc_number] => 11594459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Passivation layer for a semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/248879 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8556 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248879 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/248879
Passivation layer for a semiconductor device and method for manufacturing the same Feb 10, 2021 Issued
Array ( [id] => 18447031 [patent_doc_number] => 11682607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Package having a substrate comprising surface interconnects aligned with a surface of the substrate [patent_app_type] => utility [patent_app_number] => 17/164729 [patent_app_country] => US [patent_app_date] => 2021-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8298 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17164729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/164729
Package having a substrate comprising surface interconnects aligned with a surface of the substrate Jan 31, 2021 Issued
Array ( [id] => 18357857 [patent_doc_number] => 11646263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/155126 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 9274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155126 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/155126
Semiconductor device and method of manufacturing semiconductor device Jan 21, 2021 Issued
Array ( [id] => 17745659 [patent_doc_number] => 11393741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Micro through-silicon via for transistor density scaling [patent_app_type] => utility [patent_app_number] => 17/155757 [patent_app_country] => US [patent_app_date] => 2021-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5609 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17155757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/155757
Micro through-silicon via for transistor density scaling Jan 21, 2021 Issued
Array ( [id] => 17010982 [patent_doc_number] => 20210242143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => Semiconductor Device Having Features to Prevent Reverse Engineering [patent_app_type] => utility [patent_app_number] => 17/153420 [patent_app_country] => US [patent_app_date] => 2021-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17153420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/153420
Semiconductor Device Having Features to Prevent Reverse Engineering Jan 19, 2021 Abandoned
Array ( [id] => 16796104 [patent_doc_number] => 20210125921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/140146 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140146
Semiconductor device and method of fabricating the same Jan 3, 2021 Issued
Array ( [id] => 16781731 [patent_doc_number] => 20210118810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => Shielded Semiconductor Package with Open Terminal and Methods of Making [patent_app_type] => utility [patent_app_number] => 17/136197 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136197 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136197
Shielded semiconductor package with open terminal and methods of making Dec 28, 2020 Issued
Array ( [id] => 17217785 [patent_doc_number] => 20210351123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/130293 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130293
Semiconductor device Dec 21, 2020 Issued
Array ( [id] => 16781806 [patent_doc_number] => 20210118885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING DIFFUSION BREAK REGIONS [patent_app_type] => utility [patent_app_number] => 17/126166 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17126166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/126166
Semiconductor devices including diffusion break regions Dec 17, 2020 Issued
Array ( [id] => 16966277 [patent_doc_number] => 20210217776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => Thermal Extraction of Single Layer Transfer Integrated Circuits [patent_app_type] => utility [patent_app_number] => 17/123881 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123881 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123881
Thermal extraction of single layer transfer integrated circuits Dec 15, 2020 Issued
Array ( [id] => 18540901 [patent_doc_number] => 20230246012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => OPTICAL SENSOR PACKAGE STRUCTURE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/999954 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17999954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/999954
Optical sensor package structure and electronic device Dec 9, 2020 Issued
Array ( [id] => 17758152 [patent_doc_number] => 11398451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Methods for reusing substrates during manufacture of a bonded assembly including a logic die and a memory die [patent_app_type] => utility [patent_app_number] => 17/106831 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 101 [patent_no_of_words] => 29529 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106831
Methods for reusing substrates during manufacture of a bonded assembly including a logic die and a memory die Nov 29, 2020 Issued
Array ( [id] => 16692145 [patent_doc_number] => 20210074624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => Semiconductor Module and Method for Producing the Same [patent_app_type] => utility [patent_app_number] => 16/951556 [patent_app_country] => US [patent_app_date] => 2020-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16951556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/951556
Semiconductor module and method for producing the same Nov 17, 2020 Issued
Array ( [id] => 17926085 [patent_doc_number] => 11469350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Ultrathin solid state dies and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/099276 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 4012 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099276
Ultrathin solid state dies and methods of manufacturing the same Nov 15, 2020 Issued
Array ( [id] => 16715892 [patent_doc_number] => 20210083039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/095857 [patent_app_country] => US [patent_app_date] => 2020-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17095857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/095857
Display apparatus Nov 11, 2020 Issued
Array ( [id] => 17500782 [patent_doc_number] => 11289492 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-29 [patent_title] => Semiconductor structure and method of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 17/092349 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4132 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092349
Semiconductor structure and method of manufacturing thereof Nov 8, 2020 Issued
Array ( [id] => 17424298 [patent_doc_number] => 11257759 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-22 [patent_title] => Isolation in a semiconductor device [patent_app_type] => utility [patent_app_number] => 16/949322 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 10895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949322 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/949322
Isolation in a semiconductor device Oct 25, 2020 Issued
Array ( [id] => 17456193 [patent_doc_number] => 11271060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Display device, method of manufacturing display device, and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/079939 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 33 [patent_no_of_words] => 20508 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17079939 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/079939
Display device, method of manufacturing display device, and electronic apparatus Oct 25, 2020 Issued
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