Search

Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16759897 [patent_doc_number] => 10978454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Semiconductor device and method of forming the semiconductor device [patent_app_type] => utility [patent_app_number] => 16/776686 [patent_app_country] => US [patent_app_date] => 2020-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776686 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/776686
Semiconductor device and method of forming the semiconductor device Jan 29, 2020 Issued
Array ( [id] => 16148099 [patent_doc_number] => 10707126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Semiconductor device having interconnection structure [patent_app_type] => utility [patent_app_number] => 16/751744 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 40 [patent_no_of_words] => 15727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16751744 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/751744
Semiconductor device having interconnection structure Jan 23, 2020 Issued
Array ( [id] => 16210681 [patent_doc_number] => 20200243671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 16/752560 [patent_app_country] => US [patent_app_date] => 2020-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16752560 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/752560
Semiconductor element Jan 23, 2020 Issued
Array ( [id] => 16981806 [patent_doc_number] => 20210226043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/744811 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744811 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744811
Semiconductor structure and method of fabricating the semiconductor structure Jan 15, 2020 Issued
Array ( [id] => 16981602 [patent_doc_number] => 20210225839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Semiconductor Devices Having Gate Dielectric Layers of Varying Thicknesses and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 16/745107 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745107 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745107
Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same Jan 15, 2020 Issued
Array ( [id] => 16966230 [patent_doc_number] => 20210217729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => MULTI-CHIP STACKED DEVICES [patent_app_type] => utility [patent_app_number] => 16/741319 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16741319 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/741319
Multi-chip stacked devices Jan 12, 2020 Issued
Array ( [id] => 16966153 [patent_doc_number] => 20210217652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF [patent_app_type] => utility [patent_app_number] => 16/740483 [patent_app_country] => US [patent_app_date] => 2020-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740483
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THEREOF Jan 11, 2020 Abandoned
Array ( [id] => 16966197 [patent_doc_number] => 20210217696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => TOP VIA STACK [patent_app_type] => utility [patent_app_number] => 16/739556 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16739556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/739556
Top via stack Jan 9, 2020 Issued
Array ( [id] => 16966450 [patent_doc_number] => 20210217949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => SUPERCONDUCTOR STRUCTURE WITH NORMAL METAL CONNECTION TO A RESISTOR AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/738790 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16738790 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/738790
Superconductor structure with normal metal connection to a resistor and method of making the same Jan 8, 2020 Issued
Array ( [id] => 17470158 [patent_doc_number] => 11276641 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-15 [patent_title] => Conformal multi-plane material deposition [patent_app_type] => utility [patent_app_number] => 16/735432 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3016 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735432
Conformal multi-plane material deposition Jan 5, 2020 Issued
Array ( [id] => 15840641 [patent_doc_number] => 20200135603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => INTEGRATED CIRCUIT STRUCTURES WITH EXTENDED CONDUCTIVE PATHWAYS [patent_app_type] => utility [patent_app_number] => 16/727584 [patent_app_country] => US [patent_app_date] => 2019-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727584 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/727584
Integrated circuit structures with extended conductive pathways Dec 25, 2019 Issued
Array ( [id] => 17018403 [patent_doc_number] => 11088048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/725255 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725255 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725255
Semiconductor structure Dec 22, 2019 Issued
Array ( [id] => 16973675 [patent_doc_number] => 11069656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Three-layer package-on-package structure and method forming same [patent_app_type] => utility [patent_app_number] => 16/723210 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 4816 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723210
Three-layer package-on-package structure and method forming same Dec 19, 2019 Issued
Array ( [id] => 17516879 [patent_doc_number] => 11296040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Electrostatic discharge protection in integrated circuits [patent_app_type] => utility [patent_app_number] => 16/721442 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 43 [patent_no_of_words] => 16003 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721442
Electrostatic discharge protection in integrated circuits Dec 18, 2019 Issued
Array ( [id] => 16896258 [patent_doc_number] => 11037820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Method for forming vias and method for forming contacts in vias [patent_app_type] => utility [patent_app_number] => 16/719596 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 9158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719596
Method for forming vias and method for forming contacts in vias Dec 17, 2019 Issued
Array ( [id] => 16180526 [patent_doc_number] => 20200227495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => DISPLAY DEVICE, METHOD OF MANUFACTURING DISPLAY DEVICE, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/714254 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714254
Display device, method of manufacturing display device, and electronic apparatus Dec 12, 2019 Issued
Array ( [id] => 15775643 [patent_doc_number] => 20200118839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => PACKAGE SYSTEM FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/712184 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16712184 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/712184
Package system for integrated circuits Dec 11, 2019 Issued
Array ( [id] => 15776307 [patent_doc_number] => 20200119171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => BIPOLAR TRANSISTOR AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 16/710957 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710957
Bipolar transistor and method for producing the same Dec 10, 2019 Issued
Array ( [id] => 17529891 [patent_doc_number] => 11302589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Electron beam probing techniques and related structures [patent_app_type] => utility [patent_app_number] => 16/700976 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 17083 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700976 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/700976
Electron beam probing techniques and related structures Dec 1, 2019 Issued
Array ( [id] => 17254183 [patent_doc_number] => 11189682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/690021 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9532 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690021
Display device and method of manufacturing the same Nov 19, 2019 Issued
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