
Laura Mary Menz
Examiner (ID: 16260)
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2273 |
| Issued Applications | 1951 |
| Pending Applications | 152 |
| Abandoned Applications | 215 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17077993
[patent_doc_number] => 11114408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-07
[patent_title] => System and method for providing 3D wafer assembly with known-good-dies
[patent_app_type] => utility
[patent_app_number] => 16/687498
[patent_app_country] => US
[patent_app_date] => 2019-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5874
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687498
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/687498 | System and method for providing 3D wafer assembly with known-good-dies | Nov 17, 2019 | Issued |
Array
(
[id] => 17239698
[patent_doc_number] => 11183591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Lateral double-diffused metal-oxide-semiconductor (LDMOS) fin field effect transistor with enhanced capabilities
[patent_app_type] => utility
[patent_app_number] => 16/669193
[patent_app_country] => US
[patent_app_date] => 2019-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5077
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16669193
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/669193 | Lateral double-diffused metal-oxide-semiconductor (LDMOS) fin field effect transistor with enhanced capabilities | Oct 29, 2019 | Issued |
Array
(
[id] => 16456341
[patent_doc_number] => 20200365767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => LIGHT-EMITTING DIODE STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/667769
[patent_app_country] => US
[patent_app_date] => 2019-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10065
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667769
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/667769 | LIGHT-EMITTING DIODE STRUCTURE AND METHOD FOR FORMING THE SAME | Oct 28, 2019 | Abandoned |
Array
(
[id] => 17326576
[patent_doc_number] => 11217601
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-04
[patent_title] => Microelectronic devices including staircase structures, and related memory devices and electronic systems
[patent_app_type] => utility
[patent_app_number] => 16/667704
[patent_app_country] => US
[patent_app_date] => 2019-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 12819
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667704
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/667704 | Microelectronic devices including staircase structures, and related memory devices and electronic systems | Oct 28, 2019 | Issued |
Array
(
[id] => 17544194
[patent_doc_number] => 11309328
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-19
[patent_title] => Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems
[patent_app_type] => utility
[patent_app_number] => 16/667719
[patent_app_country] => US
[patent_app_date] => 2019-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12750
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16667719
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/667719 | Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems | Oct 28, 2019 | Issued |
Array
(
[id] => 17188869
[patent_doc_number] => 20210335754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/621740
[patent_app_country] => US
[patent_app_date] => 2019-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4876
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16621740
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/621740 | Display panel and display device | Oct 24, 2019 | Issued |
Array
(
[id] => 15776397
[patent_doc_number] => 20200119216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => OPTOELECTRONIC DEVICES MANUFACTURED USING DIFFERENT GROWTH SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 16/657765
[patent_app_country] => US
[patent_app_date] => 2019-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18355
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657765
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/657765 | Optoelectronic devices manufactured using different growth substrates | Oct 17, 2019 | Issued |
Array
(
[id] => 15776409
[patent_doc_number] => 20200119222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => METHODS OF MANUFACTURING OPTOELECTRONIC DEVICES USING DIFFERENT GROWTH SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 16/657802
[patent_app_country] => US
[patent_app_date] => 2019-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18351
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657802
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/657802 | Methods of manufacturing optoelectronic devices using different growth substrates | Oct 17, 2019 | Issued |
Array
(
[id] => 17270403
[patent_doc_number] => 11195832
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-07
[patent_title] => High performance nanosheet fabrication method with enhanced high mobility channel elements
[patent_app_type] => utility
[patent_app_number] => 16/592580
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7588
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 349
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592580
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592580 | High performance nanosheet fabrication method with enhanced high mobility channel elements | Oct 2, 2019 | Issued |
Array
(
[id] => 16081175
[patent_doc_number] => 20200194574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/592614
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6798
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592614
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592614 | Semiconductor device | Oct 2, 2019 | Issued |
Array
(
[id] => 17063294
[patent_doc_number] => 11107907
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-31
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/592422
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 44
[patent_no_of_words] => 13470
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592422
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592422 | Semiconductor device and method for manufacturing the same | Oct 2, 2019 | Issued |
Array
(
[id] => 17122166
[patent_doc_number] => 11133310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-09-28
[patent_title] => Method of making multiple nano layer transistors to enhance a multiple stack CFET performance
[patent_app_type] => utility
[patent_app_number] => 16/592519
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7154
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592519
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592519 | Method of making multiple nano layer transistors to enhance a multiple stack CFET performance | Oct 2, 2019 | Issued |
Array
(
[id] => 17152670
[patent_doc_number] => 11145761
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Horizontal gate all around and FinFET device isolation
[patent_app_type] => utility
[patent_app_number] => 16/592362
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 7304
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592362
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592362 | Horizontal gate all around and FinFET device isolation | Oct 2, 2019 | Issued |
Array
(
[id] => 16752798
[patent_doc_number] => 20210104810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-08
[patent_title] => SEMICONDUCTOR ASSEMBLY AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/592550
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9379
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592550
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592550 | Semiconductor assembly and method for manufacturing the same | Oct 2, 2019 | Issued |
Array
(
[id] => 16752435
[patent_doc_number] => 20210104447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-08
[patent_title] => SILICON ON DIAMOND THERMAL AND SHIELDING MITIGATION
[patent_app_type] => utility
[patent_app_number] => 16/592471
[patent_app_country] => US
[patent_app_date] => 2019-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7882
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592471
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/592471 | SILICON ON DIAMOND THERMAL AND SHIELDING MITIGATION | Oct 2, 2019 | Abandoned |
Array
(
[id] => 15955209
[patent_doc_number] => 10665519
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Semiconductor chip, method for mounting semiconductor chip, and module in which semiconductor chip is packaged
[patent_app_type] => utility
[patent_app_number] => 16/588030
[patent_app_country] => US
[patent_app_date] => 2019-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 30
[patent_no_of_words] => 8222
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16588030
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/588030 | Semiconductor chip, method for mounting semiconductor chip, and module in which semiconductor chip is packaged | Sep 29, 2019 | Issued |
Array
(
[id] => 16479825
[patent_doc_number] => 10854782
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-01
[patent_title] => Micro-LED device
[patent_app_type] => utility
[patent_app_number] => 16/588737
[patent_app_country] => US
[patent_app_date] => 2019-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 7785
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16588737
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/588737 | Micro-LED device | Sep 29, 2019 | Issued |
Array
(
[id] => 16973694
[patent_doc_number] => 11069676
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-20
[patent_title] => Semiconductor device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/585461
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 9937
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585461
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/585461 | Semiconductor device and method for fabricating the same | Sep 26, 2019 | Issued |
Array
(
[id] => 16774043
[patent_doc_number] => 10985164
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-04-20
[patent_title] => Semiconductor device with nanowire contact and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/585460
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 43
[patent_no_of_words] => 9679
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585460
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/585460 | Semiconductor device with nanowire contact and method for fabricating the same | Sep 26, 2019 | Issued |
Array
(
[id] => 16819981
[patent_doc_number] => 11004819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-11
[patent_title] => Prevention of bridging between solder joints
[patent_app_type] => utility
[patent_app_number] => 16/585337
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 32
[patent_no_of_words] => 11872
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585337
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/585337 | Prevention of bridging between solder joints | Sep 26, 2019 | Issued |