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Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16654078 [patent_doc_number] => 10931276 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-23 [patent_title] => Combined IGBT and superjunction MOSFET device with tuned switching speed [patent_app_type] => utility [patent_app_number] => 16/585437 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6969 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585437 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585437
Combined IGBT and superjunction MOSFET device with tuned switching speed Sep 26, 2019 Issued
Array ( [id] => 15414925 [patent_doc_number] => 20200027785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => Selective and Self-Limiting Tungsten Etch Process [patent_app_type] => utility [patent_app_number] => 16/583749 [patent_app_country] => US [patent_app_date] => 2019-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16583749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/583749
Selective and self-limiting tungsten etch process Sep 25, 2019 Issued
Array ( [id] => 18684498 [patent_doc_number] => 11780210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Glass dielectric layer with patterning [patent_app_type] => utility [patent_app_number] => 16/574252 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5152 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574252
Glass dielectric layer with patterning Sep 17, 2019 Issued
Array ( [id] => 17923640 [patent_doc_number] => 11466880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Environmental control system [patent_app_type] => utility [patent_app_number] => 16/560601 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8784 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560601 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/560601
Environmental control system Sep 3, 2019 Issued
Array ( [id] => 15184841 [patent_doc_number] => 20190363012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => SEMICONDUCTOR DEVICE HAVING INTERCONNECTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/534195 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16534195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/534195
Semiconductor device having interconnection structure Aug 6, 2019 Issued
Array ( [id] => 15154603 [patent_doc_number] => 20190355779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS FOR FORMING PATTERNED RADIATION BLOCKING ON A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/528473 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528473 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528473
Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device Jul 30, 2019 Issued
Array ( [id] => 16035041 [patent_doc_number] => 10679953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-09 [patent_title] => Integrated fan-out structure and method of forming [patent_app_type] => utility [patent_app_number] => 16/524514 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 7527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524514
Integrated fan-out structure and method of forming Jul 28, 2019 Issued
Array ( [id] => 17381370 [patent_doc_number] => 11239403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Light emitting diodes with enhanced thermal sinking and associated methods of operation [patent_app_type] => utility [patent_app_number] => 16/516214 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3691 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16516214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/516214
Light emitting diodes with enhanced thermal sinking and associated methods of operation Jul 17, 2019 Issued
Array ( [id] => 15727461 [patent_doc_number] => 10612156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Two-stage seeded growth of large aluminum nitride single crystals [patent_app_type] => utility [patent_app_number] => 16/513796 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 17732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513796
Two-stage seeded growth of large aluminum nitride single crystals Jul 16, 2019 Issued
Array ( [id] => 16567027 [patent_doc_number] => 10892404 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-01-12 [patent_title] => Sacrificial buffer layer for metal removal at a bevel edge of a substrate [patent_app_type] => utility [patent_app_number] => 16/506459 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5480 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506459 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506459
Sacrificial buffer layer for metal removal at a bevel edge of a substrate Jul 8, 2019 Issued
Array ( [id] => 16738927 [patent_doc_number] => 10964591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Processes for reducing leakage and improving adhesion [patent_app_type] => utility [patent_app_number] => 16/449736 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 7621 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449736
Processes for reducing leakage and improving adhesion Jun 23, 2019 Issued
Array ( [id] => 15300025 [patent_doc_number] => 20190393148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/438018 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438018
Semiconductor device and method of manufacturing the same Jun 10, 2019 Issued
Array ( [id] => 14875657 [patent_doc_number] => 20190288070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => FinFETs Having Dielectric Punch-Through Stoppers [patent_app_type] => utility [patent_app_number] => 16/430151 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430151
FinFETs having dielectric punch-through stoppers Jun 2, 2019 Issued
Array ( [id] => 15703629 [patent_doc_number] => 10608002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-31 [patent_title] => Method and system for object reconstruction [patent_app_type] => utility [patent_app_number] => 16/429005 [patent_app_country] => US [patent_app_date] => 2019-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 9864 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429005 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/429005
Method and system for object reconstruction Jun 1, 2019 Issued
Array ( [id] => 14938189 [patent_doc_number] => 20190304733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => FOLD OVER EMITTER AND COLLECTOR FIELD EMISSION TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/427918 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427918
Fold over emitter and collector field emission transistor May 30, 2019 Issued
Array ( [id] => 14916725 [patent_doc_number] => 10429681 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-01 [patent_title] => Structure of GOA circuit [patent_app_type] => utility [patent_app_number] => 16/427284 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2383 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427284 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427284
Structure of GOA circuit May 29, 2019 Issued
Array ( [id] => 14843055 [patent_doc_number] => 20190279928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/422655 [patent_app_country] => US [patent_app_date] => 2019-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16422655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/422655
Semiconductor structure May 23, 2019 Issued
Array ( [id] => 15626127 [patent_doc_number] => 20200083468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => FLEXIBLE DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/410471 [patent_app_country] => US [patent_app_date] => 2019-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16410471 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/410471
Flexible display panel and method of manufacturing the same May 12, 2019 Issued
Array ( [id] => 15123945 [patent_doc_number] => 20190348606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => TEST SUBSTRATE AND MANUFACTURING METHOD THEREOF, DETECTION METHOD, DISPLAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/405726 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405726 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405726
Test substrate and manufacturing method thereof, detection method, display substrate and display device May 6, 2019 Issued
Array ( [id] => 17107588 [patent_doc_number] => 11127815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Semiconductor device and method of forming the semiconductor device [patent_app_type] => utility [patent_app_number] => 16/398987 [patent_app_country] => US [patent_app_date] => 2019-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 56 [patent_no_of_words] => 7813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16398987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/398987
Semiconductor device and method of forming the semiconductor device Apr 29, 2019 Issued
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