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Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14238115 [patent_doc_number] => 20190131230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => Monolithic 3D Integration Inter-Tier Vias Insertion Scheme and Associated Layout Structure [patent_app_type] => utility [patent_app_number] => 16/220148 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220148 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/220148
Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure Dec 13, 2018 Issued
Array ( [id] => 16080785 [patent_doc_number] => 20200194379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => Shielded Semiconductor Package with Open Terminal and Methods of Making [patent_app_type] => utility [patent_app_number] => 16/220934 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220934 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/220934
Shielded semiconductor package with open terminal and methods of making Dec 13, 2018 Issued
Array ( [id] => 14181421 [patent_doc_number] => 20190110415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => VOLUMETRIC BUDGET BASED IRRIGATION CONTROL [patent_app_type] => utility [patent_app_number] => 16/218202 [patent_app_country] => US [patent_app_date] => 2018-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 45293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16218202 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/218202
Volumetric budget based irrigation control Dec 11, 2018 Issued
Array ( [id] => 15939493 [patent_doc_number] => 20200161380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => METHOD OF FABRICATING ORGANIC LIGHT-EMITTING DIODE TOUCH DISPLAY SCREEN [patent_app_type] => utility [patent_app_number] => 16/327833 [patent_app_country] => US [patent_app_date] => 2018-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327833 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/327833
Method of fabricating organic light-emitting diode touch display screen Dec 2, 2018 Issued
Array ( [id] => 15840793 [patent_doc_number] => 20200135679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SURFACE FINISHES WITH LOW RBTV FOR FINE AND MIXED BUMP PITCH ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 16/177022 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16177022 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/177022
Surface finishes with low rBTV for fine and mixed bump pitch architectures Oct 30, 2018 Issued
Array ( [id] => 15598195 [patent_doc_number] => 20200075632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => TEST CIRCUIT, ARRAY SUBSTRATE, DISPLAY PANEL, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/462638 [patent_app_country] => US [patent_app_date] => 2018-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16462638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/462638
Test circuit, array substrate, display panel, and display device Oct 9, 2018 Issued
Array ( [id] => 15351807 [patent_doc_number] => 20200013795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => NON-VOLATILE MEMORY WITH POOL CAPACITOR [patent_app_type] => utility [patent_app_number] => 16/141149 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141149
Non-volatile memory with pool capacitor Sep 24, 2018 Issued
Array ( [id] => 15688373 [patent_doc_number] => 20200098850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => FINGERED CAPACITOR WITH LOW-K AND ULTRA-LOW-K DIELECTRIC LAYERS [patent_app_type] => utility [patent_app_number] => 16/141950 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141950
Fingered capacitor with low-K and ultra-low-K dielectric layers Sep 24, 2018 Issued
Array ( [id] => 16889191 [patent_doc_number] => 20210175388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => PATTERNED EPITAXIAL STRUCTURE LASER LIFT-OFF DEVICE [patent_app_type] => utility [patent_app_number] => 16/768686 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16768686 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/768686
Patterned epitaxial structure laser lift-off device Sep 20, 2018 Issued
Array ( [id] => 14382551 [patent_doc_number] => 20190165188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/136896 [patent_app_country] => US [patent_app_date] => 2018-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16136896 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/136896
Semiconductor device and method of forming the same Sep 19, 2018 Issued
Array ( [id] => 14831603 [patent_doc_number] => 10412833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Method to neutralize incorrectly oriented printed diodes [patent_app_type] => utility [patent_app_number] => 16/135982 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16135982 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/135982
Method to neutralize incorrectly oriented printed diodes Sep 18, 2018 Issued
Array ( [id] => 15955261 [patent_doc_number] => 10665545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Semiconductor devices, semiconductor packages and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/134963 [patent_app_country] => US [patent_app_date] => 2018-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134963 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134963
Semiconductor devices, semiconductor packages and methods of forming the same Sep 18, 2018 Issued
Array ( [id] => 15657225 [patent_doc_number] => 20200091143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => GATE CUT STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/134173 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4476 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134173 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134173
Gate cut structures Sep 17, 2018 Issued
Array ( [id] => 15657223 [patent_doc_number] => 20200091142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/133795 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133795 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133795
Semiconductor device and manufacturing method thereof Sep 17, 2018 Issued
Array ( [id] => 15657151 [patent_doc_number] => 20200091106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => SEMICONDUCTOR CHIP PACKAGING STRUCTURE WITHOUT SOLDERING WIRE, AND PACKAGING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/134123 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134123
Semiconductor chip packaging structure without soldering wire, and packaging method thereof Sep 17, 2018 Issued
Array ( [id] => 14110489 [patent_doc_number] => 20190096920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => ARRAY SUBSTRATE, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/134201 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134201 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134201
Array substrate, method of manufacturing the same and display device Sep 17, 2018 Issued
Array ( [id] => 16264727 [patent_doc_number] => 10756175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Inner spacer formation and contact resistance reduction in nanosheet transistors [patent_app_type] => utility [patent_app_number] => 16/134203 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 7999 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134203
Inner spacer formation and contact resistance reduction in nanosheet transistors Sep 17, 2018 Issued
Array ( [id] => 15657577 [patent_doc_number] => 20200091319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => OXIDE ISOLATED FIN-TYPE FIELD-EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/133763 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133763 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133763
Oxide isolated fin-type field-effect transistors Sep 17, 2018 Issued
Array ( [id] => 14138269 [patent_doc_number] => 20190103524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => Multi-Emission Quantum Dot and Quantum Dot Film, Led Package, Emitting Diode and Display Device Including the Same [patent_app_type] => utility [patent_app_number] => 16/134447 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134447
Multi-emission quantum dot and quantum dot film, LED package, emitting diode and display device including the same Sep 17, 2018 Issued
Array ( [id] => 13878905 [patent_doc_number] => 20190035793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => Method of Forming Semiconductor Device Including Tungsten Layer [patent_app_type] => utility [patent_app_number] => 16/134771 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134771
Method of forming semiconductor device including tungsten layer Sep 17, 2018 Issued
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