Search

Laura Mary Menz

Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2324
Issued Applications
1995
Pending Applications
138
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13543415 [patent_doc_number] => 20180323254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => SEMICONDUCTOR DIE WITH BACK-SIDE INTEGRATED INDUCTIVE COMPONENT [patent_app_type] => utility [patent_app_number] => 16/023377 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16023377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/023377
Semiconductor die with back-side integrated inductive component Jun 28, 2018 Issued
Array ( [id] => 13514701 [patent_doc_number] => 20180308893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => CMOS IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 16/019281 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019281 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/019281
CMOS image sensor Jun 25, 2018 Issued
Array ( [id] => 15200719 [patent_doc_number] => 10497866 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => Ionic floating-gate memory device [patent_app_type] => utility [patent_app_number] => 16/012430 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 7478 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012430
Ionic floating-gate memory device Jun 18, 2018 Issued
Array ( [id] => 15475425 [patent_doc_number] => 10553598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Three-dimensional semiconductor devices including vertical structures [patent_app_type] => utility [patent_app_number] => 16/012046 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 35 [patent_no_of_words] => 12209 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012046 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012046
Three-dimensional semiconductor devices including vertical structures Jun 18, 2018 Issued
Array ( [id] => 13629873 [patent_doc_number] => 20180366489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => 3-Dimensional NOR Memory Array Architecture and Methods for Fabrication Thereof [patent_app_type] => utility [patent_app_number] => 16/012731 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -49 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012731 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012731
3-dimensional NOR memory array architecture and methods for fabrication thereof Jun 18, 2018 Issued
Array ( [id] => 16202007 [patent_doc_number] => 10727187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Solid oxide battery [patent_app_type] => utility [patent_app_number] => 16/012155 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 28 [patent_no_of_words] => 7731 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012155 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/012155
Solid oxide battery Jun 18, 2018 Issued
Array ( [id] => 13741027 [patent_doc_number] => 20180374983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => METHOD OF MANUFACTURING A SPAD CELL [patent_app_type] => utility [patent_app_number] => 16/008613 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008613
METHOD OF MANUFACTURING A SPAD CELL Jun 13, 2018 Abandoned
Array ( [id] => 16386712 [patent_doc_number] => 10811557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Growth structure under a release layer for manufacturing of optoelectronic devices [patent_app_type] => utility [patent_app_number] => 16/008919 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7003 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008919 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008919
Growth structure under a release layer for manufacturing of optoelectronic devices Jun 13, 2018 Issued
Array ( [id] => 14821607 [patent_doc_number] => 10407798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Two-stage seeded growth of large aluminum nitride single crystals [patent_app_type] => utility [patent_app_number] => 16/008407 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 17714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008407 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008407
Two-stage seeded growth of large aluminum nitride single crystals Jun 13, 2018 Issued
Array ( [id] => 14137833 [patent_doc_number] => 20190103306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => METHOD FOR FORMING VIAS AND METHOD FOR FORMING CONTACTS IN VIAS [patent_app_type] => utility [patent_app_number] => 16/007648 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007648 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/007648
Method for forming vias and method for forming contacts in vias Jun 12, 2018 Issued
Array ( [id] => 15488275 [patent_doc_number] => 10559497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Seamless tungsten fill by tungsten oxidation-reduction [patent_app_type] => utility [patent_app_number] => 16/006402 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3109 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006402
Seamless tungsten fill by tungsten oxidation-reduction Jun 11, 2018 Issued
Array ( [id] => 15760251 [patent_doc_number] => 10622253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 16/006739 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4123 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16006739 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/006739
Manufacturing method of semiconductor device Jun 11, 2018 Issued
Array ( [id] => 14843691 [patent_doc_number] => 20190280246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/338165 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9482 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16338165 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/338165
Display substrate and manufacturing method therefor, and display device Jun 6, 2018 Issued
Array ( [id] => 16638050 [patent_doc_number] => 10916565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => LTPS substrate and fabricating method thereof, thin film transistor thereof, array substrate thereof and display device thereof [patent_app_type] => utility [patent_app_number] => 16/330922 [patent_app_country] => US [patent_app_date] => 2018-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3605 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16330922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/330922
LTPS substrate and fabricating method thereof, thin film transistor thereof, array substrate thereof and display device thereof May 14, 2018 Issued
Array ( [id] => 13421249 [patent_doc_number] => 20180262167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/976734 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7483 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/976734
Semiconductor device May 9, 2018 Issued
Array ( [id] => 15185103 [patent_doc_number] => 20190363143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => ORGANIC ELECTROLUMINESCENT DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/332876 [patent_app_country] => US [patent_app_date] => 2018-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16332876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/332876
Organic electroluminescent display panel and display device May 2, 2018 Issued
Array ( [id] => 15185039 [patent_doc_number] => 20190363111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => METHOD FOR FABRICATING ARRAY SUBSTRATE MOTHERBOARD, ARRAY SUBSTRATE MOTHERBOARD AND DETECTION METHOD [patent_app_type] => utility [patent_app_number] => 16/331766 [patent_app_country] => US [patent_app_date] => 2018-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4872 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16331766 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/331766
Method for fabricating array substrate motherboard, array substrate motherboard and detection method May 1, 2018 Issued
Array ( [id] => 13378519 [patent_doc_number] => 20180240801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 15/960492 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15960492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/960492
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Apr 22, 2018 Abandoned
Array ( [id] => 13392961 [patent_doc_number] => 20180248023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => BIPOLAR TRANSISTOR AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 15/957702 [patent_app_country] => US [patent_app_date] => 2018-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15957702 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/957702
Bipolar transistor and method for producing the same Apr 18, 2018 Issued
Array ( [id] => 13378421 [patent_doc_number] => 20180240752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => BEOL VERTICAL FUSE FORMED OVER AIR GAP [patent_app_type] => utility [patent_app_number] => 15/956355 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956355 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956355
BEOL vertical fuse formed over air gap Apr 17, 2018 Issued
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