Search

Laura Mary Menz

Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2324
Issued Applications
1995
Pending Applications
138
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12516447 [patent_doc_number] => 10002950 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-19 [patent_title] => Bipolar transistor and method for producing the same [patent_app_type] => utility [patent_app_number] => 15/694111 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6301 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694111 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/694111
Bipolar transistor and method for producing the same Aug 31, 2017 Issued
Array ( [id] => 14558215 [patent_doc_number] => 10347578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/673628 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 7011 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673628 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673628
Semiconductor structure and fabrication method thereof Aug 9, 2017 Issued
Array ( [id] => 12517509 [patent_doc_number] => 10003307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/673811 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7466 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673811
Semiconductor device Aug 9, 2017 Issued
Array ( [id] => 12054595 [patent_doc_number] => 20170330939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'FinFETs Having Dielectric Punch-Through Stoppers' [patent_app_type] => utility [patent_app_number] => 15/665184 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665184 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665184
FinFETs having dielectric punch-through stoppers Jul 30, 2017 Issued
Array ( [id] => 14300729 [patent_doc_number] => 10290495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Electronic apparatus and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 15/660339 [patent_app_country] => US [patent_app_date] => 2017-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 41 [patent_no_of_words] => 21873 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15660339 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/660339
Electronic apparatus and manufacturing method of the same Jul 25, 2017 Issued
Array ( [id] => 12739834 [patent_doc_number] => 20180138445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => LASER WELDING TRANSPARENT GLASS SHEETS USING LOW MELTING GLASS OR THIN ABSORBING FILMS [patent_app_type] => utility [patent_app_number] => 15/655194 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655194 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655194
Laser welding transparent glass sheets using low melting glass or thin absorbing films Jul 19, 2017 Issued
Array ( [id] => 14801587 [patent_doc_number] => 10403805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Light emitting diodes with enhanced thermal sinking and associated methods of operation [patent_app_type] => utility [patent_app_number] => 15/652632 [patent_app_country] => US [patent_app_date] => 2017-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3663 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15652632 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/652632
Light emitting diodes with enhanced thermal sinking and associated methods of operation Jul 17, 2017 Issued
Array ( [id] => 14672161 [patent_doc_number] => 10374001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/653281 [patent_app_country] => US [patent_app_date] => 2017-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4792 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15653281 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/653281
Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device Jul 17, 2017 Issued
Array ( [id] => 12001588 [patent_doc_number] => 20170305743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'METHOD FOR FORMING FUNCTIONAL PART IN MINUTE SPACE' [patent_app_type] => utility [patent_app_number] => 15/643417 [patent_app_country] => US [patent_app_date] => 2017-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4261 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15643417 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/643417
Method for forming functional part in minute space Jul 5, 2017 Issued
Array ( [id] => 11997523 [patent_doc_number] => 20170301678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 15/635970 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 22346 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635970 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635970
Semiconductor integrated circuit device Jun 27, 2017 Issued
Array ( [id] => 11983671 [patent_doc_number] => 20170287826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'MONOLITHIC 3D INTEGRATION INTER-TIER VIAS INSERTION SCHEME AND ASSOCIATED LAYOUT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/630685 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15630685 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/630685
Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure Jun 21, 2017 Issued
Array ( [id] => 14526019 [patent_doc_number] => 10340280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Method and system for object reconstruction [patent_app_type] => utility [patent_app_number] => 15/623408 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 9852 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623408 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623408
Method and system for object reconstruction Jun 14, 2017 Issued
Array ( [id] => 12334797 [patent_doc_number] => 09947600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Semiconductor structure having a test structure formed in a group III nitride layer [patent_app_type] => utility [patent_app_number] => 15/622109 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8130 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15622109 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/622109
Semiconductor structure having a test structure formed in a group III nitride layer Jun 13, 2017 Issued
Array ( [id] => 11967254 [patent_doc_number] => 20170271407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => '3-D PLANES MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/613842 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5441 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613842 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613842
3-D PLANES MEMORY DEVICE Jun 4, 2017 Abandoned
Array ( [id] => 13132307 [patent_doc_number] => 10084093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-25 [patent_title] => Low resistance conductive contacts [patent_app_type] => utility [patent_app_number] => 15/600872 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5046 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600872 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600872
Low resistance conductive contacts May 21, 2017 Issued
Array ( [id] => 13188251 [patent_doc_number] => 10109653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Array substrate, manufacturing method thereof and display device [patent_app_type] => utility [patent_app_number] => 15/568155 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3592 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15568155 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/568155
Array substrate, manufacturing method thereof and display device May 11, 2017 Issued
Array ( [id] => 13228673 [patent_doc_number] => 10128116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Integrated direct dielectric and metal deposition [patent_app_type] => utility [patent_app_number] => 15/593187 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593187
Integrated direct dielectric and metal deposition May 10, 2017 Issued
Array ( [id] => 12061772 [patent_doc_number] => 20170338115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Method for Forming Conductive Lines' [patent_app_type] => utility [patent_app_number] => 15/593214 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593214 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593214
Method for forming conductive lines May 10, 2017 Issued
Array ( [id] => 12498762 [patent_doc_number] => 09997548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-12 [patent_title] => Method of fabricating semiconductor display apparatus [patent_app_type] => utility [patent_app_number] => 15/593317 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2624 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593317
Method of fabricating semiconductor display apparatus May 10, 2017 Issued
Array ( [id] => 13188217 [patent_doc_number] => 10109635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Method of forming semiconductor device including tungsten layer [patent_app_type] => utility [patent_app_number] => 15/593131 [patent_app_country] => US [patent_app_date] => 2017-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3191 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593131 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593131
Method of forming semiconductor device including tungsten layer May 10, 2017 Issued
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