Search

Laura Mary Menz

Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2324
Issued Applications
1995
Pending Applications
138
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12214873 [patent_doc_number] => 09911688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Semiconductor chip, semiconductor package including the same, and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 15/201694 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 14227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201694 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201694
Semiconductor chip, semiconductor package including the same, and method of fabricating the same Jul 4, 2016 Issued
Array ( [id] => 11385941 [patent_doc_number] => 20170011996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING INTERCONNECTION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/201922 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 16579 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201922 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201922
Semiconductor device having interconnection structure Jul 4, 2016 Issued
Array ( [id] => 12019671 [patent_doc_number] => 09812381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-07 [patent_title] => 'Integrated fan-out package and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 15/201604 [patent_app_country] => US [patent_app_date] => 2016-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5072 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201604
Integrated fan-out package and method of fabricating the same Jul 3, 2016 Issued
Array ( [id] => 11502981 [patent_doc_number] => 20170077165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR UNIT AND THE SEMICONDUCTOR UNIT' [patent_app_type] => utility [patent_app_number] => 15/201485 [patent_app_country] => US [patent_app_date] => 2016-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 21463 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201485 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/201485
Method of manufacturing semiconductor unit and the semiconductor unit Jul 2, 2016 Issued
Array ( [id] => 11365682 [patent_doc_number] => 20170003663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'Equipment Isolation System' [patent_app_type] => utility [patent_app_number] => 15/199607 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7415 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15199607 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/199607
Equipment Isolation System Jun 29, 2016 Abandoned
Array ( [id] => 12109251 [patent_doc_number] => 09865741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Method for producing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/191711 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 138 [patent_no_of_words] => 8665 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15191711 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/191711
Method for producing semiconductor device and semiconductor device Jun 23, 2016 Issued
Array ( [id] => 11110906 [patent_doc_number] => 20160307876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => '3D Die Stacking Structure with Fine Pitches' [patent_app_type] => utility [patent_app_number] => 15/191838 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3417 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15191838 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/191838
3D die stacking structure with fine pitches Jun 23, 2016 Issued
Array ( [id] => 11110753 [patent_doc_number] => 20160307723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'FOLD OVER EMITTER AND COLLECTOR FIELD EMISSION TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/192011 [patent_app_country] => US [patent_app_date] => 2016-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7963 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15192011 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/192011
Fold over emitter and collector field emission transistor Jun 23, 2016 Issued
Array ( [id] => 14061115 [patent_doc_number] => 10234850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Controller having a communications interface, receiver and method for communication [patent_app_type] => utility [patent_app_number] => 15/179001 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5286 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15179001 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/179001
Controller having a communications interface, receiver and method for communication Jun 9, 2016 Issued
Array ( [id] => 11432559 [patent_doc_number] => 09570888 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method of strain engineering and related optical device using a gallium and nitrogen containing active region' [patent_app_type] => utility [patent_app_number] => 15/177956 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 18906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177956 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177956
Method of strain engineering and related optical device using a gallium and nitrogen containing active region Jun 8, 2016 Issued
Array ( [id] => 12693637 [patent_doc_number] => 20180123045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => PRODUCTION METHOD OF ORGANIC EL DEVICE [patent_app_type] => utility [patent_app_number] => 15/568954 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7758 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15568954 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/568954
Production method of organic EL device Jun 8, 2016 Issued
Array ( [id] => 11631022 [patent_doc_number] => 20170141211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-18 [patent_title] => 'SINGLE AND DOUBLE DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS COMPRISED OF FINFET DEVICES' [patent_app_type] => utility [patent_app_number] => 15/168690 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168690 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168690
Single and double diffusion breaks on integrated circuit products comprised of FinFET devices May 30, 2016 Issued
Array ( [id] => 12047118 [patent_doc_number] => 09824726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Semiconductor device having air-gap' [patent_app_type] => utility [patent_app_number] => 15/164442 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 90 [patent_figures_cnt] => 92 [patent_no_of_words] => 17759 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164442
Semiconductor device having air-gap May 24, 2016 Issued
Array ( [id] => 11063719 [patent_doc_number] => 20160260681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'INTERFACIAL ALLOY LAYER FOR IMPROVING ELECTROMIGRATION (EM) RESISTANCE IN SOLDER JOINTS' [patent_app_type] => utility [patent_app_number] => 15/159442 [patent_app_country] => US [patent_app_date] => 2016-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3074 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159442
Interfacial alloy layer for improving electromigration (EM) resistance in solder joints May 18, 2016 Issued
Array ( [id] => 11063786 [patent_doc_number] => 20160260748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'THIN FILM TRANSISTOR AND DISPLAY PANEL INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/155325 [patent_app_country] => US [patent_app_date] => 2016-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3158 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15155325 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/155325
Thin film transistor and display panel including the same May 15, 2016 Issued
Array ( [id] => 13019461 [patent_doc_number] => 10032850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Semiconductor die with back-side integrated inductive component [patent_app_type] => utility [patent_app_number] => 15/152518 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 5387 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152518 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152518
Semiconductor die with back-side integrated inductive component May 10, 2016 Issued
Array ( [id] => 11273858 [patent_doc_number] => 20160336405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'HORIZONTAL GATE ALL AROUND AND FINFET DEVICE ISOLATION' [patent_app_type] => utility [patent_app_number] => 15/152273 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7440 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152273
Horizontal gate all around and FinFET device isolation May 10, 2016 Issued
Array ( [id] => 11718231 [patent_doc_number] => 20170186730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES' [patent_app_type] => utility [patent_app_number] => 15/152469 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152469 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152469
SYSTEM AND METHOD FOR PROVIDING 3D WAFER ASSEMBLY WITH KNOWN-GOOD-DIES May 10, 2016 Abandoned
Array ( [id] => 11831721 [patent_doc_number] => 09728470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Semiconductor structure and methods' [patent_app_type] => utility [patent_app_number] => 15/150885 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8342 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15150885 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/150885
Semiconductor structure and methods May 9, 2016 Issued
Array ( [id] => 13187901 [patent_doc_number] => 10109477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 15/151100 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 6644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151100
Semiconductor device and method May 9, 2016 Issued
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