Laura Mary Menz

Array ( [id] => 11466916 [patent_doc_number] => 09583557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Integrated circuits including a MIMCAP device and methods of forming the same for long and controllable reliability lifetime' [patent_app_type] => utility [patent_app_number] => 14/835278 [patent_app_country] => US [patent_app_date] => 2015-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4014 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11681411 [patent_doc_number] => 09679946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => '3-D planes memory device' [patent_app_type] => utility [patent_app_number] => 14/835642 [patent_app_country] => US [patent_app_date] => 2015-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5432 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11346362 [patent_doc_number] => 09530778 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Semiconductor devices having metal gate and method for manufacturing semiconductor devices having metal gate' [patent_app_type] => utility [patent_app_number] => 14/834439 [patent_app_country] => US [patent_app_date] => 2015-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5848 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14834439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11415138 [patent_doc_number] => 09561953 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Method of forming a protective coating for a packaged semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/833871 [patent_app_country] => US [patent_app_date] => 2015-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4644 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14833871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14419521 [patent_doc_number] => 10314544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Method, apparatus and computer program for activity sensor data processing [patent_app_type] => utility [patent_app_number] => 14/828282 [patent_app_country] => US [patent_app_date] => 2015-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8312 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14828282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10455364 [patent_doc_number] => 20150340380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'INTEGRATED CIRCUIT INCLUDING A SEMICONDUCTOR-ON-INSULATOR REGION AND A BULK REGION' [patent_app_type] => utility [patent_app_number] => 14/817734 [patent_app_country] => US [patent_app_date] => 2015-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9349 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14817734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10495543 [patent_doc_number] => 20150380564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/814597 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 22821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10495543 [patent_doc_number] => 20150380564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/814597 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 22821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10495543 [patent_doc_number] => 20150380564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/814597 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 22821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10495543 [patent_doc_number] => 20150380564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/814597 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 22821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11825305 [patent_doc_number] => 20170214242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'SYSTEM AND METHOD FOR ASSESSING SMART POWER GRID NETWORKS' [patent_app_type] => utility [patent_app_number] => 15/321512 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4352 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321512 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13140839 [patent_doc_number] => 10087741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Predicting pump performance in downhole tools [patent_app_type] => utility [patent_app_number] => 14/755198 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 9819 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14755198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10563505 [patent_doc_number] => 09287185 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'Determining appropriateness of sampling integrated circuit test data in the presence of manufacturing variations' [patent_app_type] => utility [patent_app_number] => 14/753771 [patent_app_country] => US [patent_app_date] => 2015-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 7185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14753771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11665438 [patent_doc_number] => 20170154158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'CONTROL DEVICE FOR A MEDICAL APPLIANCE' [patent_app_type] => utility [patent_app_number] => 15/322343 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15322343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11489520 [patent_doc_number] => 09595595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs' [patent_app_type] => utility [patent_app_number] => 14/750120 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 2816 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14423549 [patent_doc_number] => 10316566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Modular door drive control system, and modular door drive system [patent_app_type] => utility [patent_app_number] => 15/321317 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5644 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11265908 [patent_doc_number] => 09490211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-08 [patent_title] => 'Copper interconnect' [patent_app_type] => utility [patent_app_number] => 14/747949 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2622 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11221700 [patent_doc_number] => 09450045 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-20 [patent_title] => 'Method for forming lateral super-junction structure' [patent_app_type] => utility [patent_app_number] => 14/747961 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 8295 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10402828 [patent_doc_number] => 20150287837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/745950 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 21887 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10426116 [patent_doc_number] => 20150311127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS' [patent_app_type] => utility [patent_app_number] => 14/739627 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7555 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739627 [rel_patent_id] =>[rel_patent_doc_number] =>)