Search

Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11825305 [patent_doc_number] => 20170214242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'SYSTEM AND METHOD FOR ASSESSING SMART POWER GRID NETWORKS' [patent_app_type] => utility [patent_app_number] => 15/321512 [patent_app_country] => US [patent_app_date] => 2015-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4352 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321512 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/321512
SYSTEM AND METHOD FOR ASSESSING SMART POWER GRID NETWORKS Jul 1, 2015 Abandoned
Array ( [id] => 13140839 [patent_doc_number] => 10087741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Predicting pump performance in downhole tools [patent_app_type] => utility [patent_app_number] => 14/755198 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 9819 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14755198 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/755198
Predicting pump performance in downhole tools Jun 29, 2015 Issued
Array ( [id] => 10563505 [patent_doc_number] => 09287185 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-15 [patent_title] => 'Determining appropriateness of sampling integrated circuit test data in the presence of manufacturing variations' [patent_app_type] => utility [patent_app_number] => 14/753771 [patent_app_country] => US [patent_app_date] => 2015-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 7185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14753771 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/753771
Determining appropriateness of sampling integrated circuit test data in the presence of manufacturing variations Jun 28, 2015 Issued
Array ( [id] => 11665438 [patent_doc_number] => 20170154158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'CONTROL DEVICE FOR A MEDICAL APPLIANCE' [patent_app_type] => utility [patent_app_number] => 15/322343 [patent_app_country] => US [patent_app_date] => 2015-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3436 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15322343 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/322343
CONTROL DEVICE FOR A MEDICAL APPLIANCE Jun 25, 2015 Abandoned
Array ( [id] => 11489520 [patent_doc_number] => 09595595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs' [patent_app_type] => utility [patent_app_number] => 14/750120 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 2816 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750120 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/750120
Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs Jun 24, 2015 Issued
Array ( [id] => 14423549 [patent_doc_number] => 10316566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Modular door drive control system, and modular door drive system [patent_app_type] => utility [patent_app_number] => 15/321317 [patent_app_country] => US [patent_app_date] => 2015-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5644 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15321317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/321317
Modular door drive control system, and modular door drive system Jun 23, 2015 Issued
Array ( [id] => 11221700 [patent_doc_number] => 09450045 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-20 [patent_title] => 'Method for forming lateral super-junction structure' [patent_app_type] => utility [patent_app_number] => 14/747961 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 8295 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747961 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747961
Method for forming lateral super-junction structure Jun 22, 2015 Issued
Array ( [id] => 11265908 [patent_doc_number] => 09490211 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-08 [patent_title] => 'Copper interconnect' [patent_app_type] => utility [patent_app_number] => 14/747949 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2622 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747949 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747949
Copper interconnect Jun 22, 2015 Issued
Array ( [id] => 10402828 [patent_doc_number] => 20150287837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/745950 [patent_app_country] => US [patent_app_date] => 2015-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 21887 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14745950 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/745950
Semiconductor device and method for manufacturing the same Jun 21, 2015 Issued
Array ( [id] => 10426116 [patent_doc_number] => 20150311127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS' [patent_app_type] => utility [patent_app_number] => 14/739627 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7555 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739627 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739627
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS Jun 14, 2015 Abandoned
Array ( [id] => 10394739 [patent_doc_number] => 20150279746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS' [patent_app_type] => utility [patent_app_number] => 14/739562 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7555 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739562 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739562
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS Jun 14, 2015 Abandoned
Array ( [id] => 10394930 [patent_doc_number] => 20150279937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS' [patent_app_type] => utility [patent_app_number] => 14/739669 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7555 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739669 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739669
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS Jun 14, 2015 Abandoned
Array ( [id] => 10426292 [patent_doc_number] => 20150311303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-29 [patent_title] => 'STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS' [patent_app_type] => utility [patent_app_number] => 14/739686 [patent_app_country] => US [patent_app_date] => 2015-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7556 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14739686 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/739686
STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS Jun 14, 2015 Abandoned
Array ( [id] => 11883598 [patent_doc_number] => 09754778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Metallization of fluorocarbon-based dielectric for interconnects' [patent_app_type] => utility [patent_app_number] => 14/731324 [patent_app_country] => US [patent_app_date] => 2015-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6291 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731324 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/731324
Metallization of fluorocarbon-based dielectric for interconnects Jun 3, 2015 Issued
Array ( [id] => 10410198 [patent_doc_number] => 20150295207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'ORGANIC LIGHT-EMITTING DISPLAY DEVICE, METHOD OF MANUFACTURING THE SAME, AND DONOR SUBSTRATE AND DONOR SUBSTRATE SET USED TO MANUFACTURE THE ORGANIC LIGHT-EMITTING DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/730129 [patent_app_country] => US [patent_app_date] => 2015-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10378 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14730129 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/730129
Organic light-emitting display device, method of manufacturing the same, and donor substrate and donor substrate set used to manufacture the organic light-emitting display device Jun 2, 2015 Issued
Array ( [id] => 10689832 [patent_doc_number] => 20160035978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-04 [patent_title] => 'Display Module Manufacturing Method and Display Module' [patent_app_type] => utility [patent_app_number] => 14/727415 [patent_app_country] => US [patent_app_date] => 2015-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4910 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727415 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/727415
Display module manufacturing method and display module May 31, 2015 Issued
Array ( [id] => 10495617 [patent_doc_number] => 20150380639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'MEMORY CIRCUIT AND METHOD OF FORMING THE SAME USING REDUCED MASK STEPS' [patent_app_type] => utility [patent_app_number] => 14/726938 [patent_app_country] => US [patent_app_date] => 2015-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4297 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14726938 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/726938
Memory circuit and method of forming the same using reduced mask steps May 31, 2015 Issued
Array ( [id] => 12019843 [patent_doc_number] => 09812555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-07 [patent_title] => 'Bottom-gate thin-body transistors for stacked wafer integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/723719 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6074 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723719 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/723719
Bottom-gate thin-body transistors for stacked wafer integrated circuits May 27, 2015 Issued
Array ( [id] => 11201198 [patent_doc_number] => 09431419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Semiconductor memory device and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 14/722543 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 27 [patent_no_of_words] => 6553 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722543 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722543
Semiconductor memory device and method for manufacturing same May 26, 2015 Issued
Array ( [id] => 11776177 [patent_doc_number] => 09385129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Method of forming a memory capacitor structure using a self-assembly pattern' [patent_app_type] => utility [patent_app_number] => 14/720279 [patent_app_country] => US [patent_app_date] => 2015-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 4878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720279 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/720279
Method of forming a memory capacitor structure using a self-assembly pattern May 21, 2015 Issued
Menu