
Laura Mary Menz
Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2324 |
| Issued Applications | 1995 |
| Pending Applications | 138 |
| Abandoned Applications | 216 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12431889
[patent_doc_number] => 09977142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-22
[patent_title] => Efficient line search methods for multi-parameter full wavefield inversion
[patent_app_type] => utility
[patent_app_number] => 14/670039
[patent_app_country] => US
[patent_app_date] => 2015-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3379
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14670039
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/670039 | Efficient line search methods for multi-parameter full wavefield inversion | Mar 25, 2015 | Issued |
Array
(
[id] => 10531501
[patent_doc_number] => 09257650
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-09
[patent_title] => 'Method for producing display device'
[patent_app_type] => utility
[patent_app_number] => 14/660118
[patent_app_country] => US
[patent_app_date] => 2015-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3360
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14660118
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/660118 | Method for producing display device | Mar 16, 2015 | Issued |
Array
(
[id] => 10418109
[patent_doc_number] => 20150303119
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-22
[patent_title] => 'METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/657341
[patent_app_country] => US
[patent_app_date] => 2015-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 13413
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14657341
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/657341 | Method of manufacturing silicon carbide semiconductor device | Mar 12, 2015 | Issued |
Array
(
[id] => 12416712
[patent_doc_number] => 09972517
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Anomaly detection system and method of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 14/645978
[patent_app_country] => US
[patent_app_date] => 2015-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 10505
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14645978
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/645978 | Anomaly detection system and method of manufacturing semiconductor device | Mar 11, 2015 | Issued |
Array
(
[id] => 10279430
[patent_doc_number] => 20150164428
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-18
[patent_title] => 'Method for Multi-Scale Quality Assessment for Variability Analysis'
[patent_app_type] => utility
[patent_app_number] => 14/632679
[patent_app_country] => US
[patent_app_date] => 2015-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8648
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14632679
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/632679 | Method for Multi-Scale Quality Assessment for Variability Analysis | Feb 25, 2015 | Abandoned |
Array
(
[id] => 10277531
[patent_doc_number] => 20150162528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-11
[patent_title] => 'POST-FABRICATION SELF-ALIGNED INITIALIZATION OF INTEGRATED DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/626945
[patent_app_country] => US
[patent_app_date] => 2015-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7897
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14626945
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/626945 | POST-FABRICATION SELF-ALIGNED INITIALIZATION OF INTEGRATED DEVICES | Feb 19, 2015 | |
Array
(
[id] => 10341616
[patent_doc_number] => 20150226621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-13
[patent_title] => 'SYSTEM AND METHOD FOR HEAD ACCELERATION MEASUREMENT IN HELMETED ACTIVITIES'
[patent_app_type] => utility
[patent_app_number] => 14/621630
[patent_app_country] => US
[patent_app_date] => 2015-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9333
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621630
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/621630 | System and method for head acceleration measurement in helmeted activities | Feb 12, 2015 | Issued |
Array
(
[id] => 10358881
[patent_doc_number] => 20150243886
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-08-27
[patent_title] => 'MONOLITHICALLY INTEGRATED RESISTIVE MEMORY USING INTEGRATED-CIRCUIT FOUNDRY COMPATIBLE PROCESSES'
[patent_app_type] => utility
[patent_app_number] => 14/587711
[patent_app_country] => US
[patent_app_date] => 2014-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 19116
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587711
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/587711 | Monolithically integrated resistive memory using integrated-circuit foundry compatible processes | Dec 30, 2014 | Issued |
Array
(
[id] => 10226357
[patent_doc_number] => 20150111349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-23
[patent_title] => 'SEMICONDUCTOR STRUCTURE INCLUDING A SEMICONDUCTOR-ON-INSULATOR REGION AND A BULK REGION, AND METHOD FOR THE FORMATION THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/579255
[patent_app_country] => US
[patent_app_date] => 2014-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9349
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579255
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/579255 | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof | Dec 21, 2014 | Issued |
Array
(
[id] => 10214357
[patent_doc_number] => 20150099349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-09
[patent_title] => 'SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS'
[patent_app_type] => utility
[patent_app_number] => 14/571579
[patent_app_country] => US
[patent_app_date] => 2014-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4010
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14571579
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/571579 | Silicon germanium and germanium multigate and nanowire structures for logic and multilevel memory applications | Dec 15, 2014 | Issued |
Array
(
[id] => 13018907
[patent_doc_number] => 10032569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-24
[patent_title] => Nanodevice arrays for electrical energy storage, capture and management and method for their formation
[patent_app_type] => utility
[patent_app_number] => 14/570921
[patent_app_country] => US
[patent_app_date] => 2014-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 11094
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14570921
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/570921 | Nanodevice arrays for electrical energy storage, capture and management and method for their formation | Dec 14, 2014 | Issued |
Array
(
[id] => 10212280
[patent_doc_number] => 20150097273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-09
[patent_title] => 'METHOD AND STRUCTURE OF FORMING BACKSIDE THROUGH SILICON VIA CONNECTIONS'
[patent_app_type] => utility
[patent_app_number] => 14/569844
[patent_app_country] => US
[patent_app_date] => 2014-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2783
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14569844
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/569844 | METHOD AND STRUCTURE OF FORMING BACKSIDE THROUGH SILICON VIA CONNECTIONS | Dec 14, 2014 | Abandoned |
Array
(
[id] => 11807279
[patent_doc_number] => 09548362
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-17
[patent_title] => 'High mobility devices with anti-punch through layers and methods of forming same'
[patent_app_type] => utility
[patent_app_number] => 14/555128
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 38
[patent_no_of_words] => 6453
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14555128
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/555128 | High mobility devices with anti-punch through layers and methods of forming same | Nov 25, 2014 | Issued |
Array
(
[id] => 10230370
[patent_doc_number] => 20150115364
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'SELF-PROTECTED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 14/554643
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7275
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554643
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554643 | Self-protected metal-oxide-semiconductor field-effect transistor | Nov 25, 2014 | Issued |
Array
(
[id] => 11770309
[patent_doc_number] => 09379002
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-28
[patent_title] => 'Semiconductor device having air-gap'
[patent_app_type] => utility
[patent_app_number] => 14/554113
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 90
[patent_figures_cnt] => 92
[patent_no_of_words] => 17746
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554113
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554113 | Semiconductor device having air-gap | Nov 25, 2014 | Issued |
Array
(
[id] => 10802844
[patent_doc_number] => 20160149001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'GRADED HETEROJUNCTION NANOWIRE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/554584
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5296
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554584
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554584 | Graded heterojunction nanowire device | Nov 25, 2014 | Issued |
Array
(
[id] => 10802651
[patent_doc_number] => 20160148808
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/554107
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 8922
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554107
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554107 | Method for fabricating semiconductor device | Nov 25, 2014 | Issued |
Array
(
[id] => 10570290
[patent_doc_number] => 09293469
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-22
[patent_title] => 'Flash memory and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/554651
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 8573
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554651
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554651 | Flash memory and fabrication method thereof | Nov 25, 2014 | Issued |
Array
(
[id] => 10590723
[patent_doc_number] => 09312345
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-12
[patent_title] => 'High-resistive silicon substrate with a reduced radio frequency loss for a radio-frequency integrated passive device'
[patent_app_type] => utility
[patent_app_number] => 14/554435
[patent_app_country] => US
[patent_app_date] => 2014-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4273
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14554435
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/554435 | High-resistive silicon substrate with a reduced radio frequency loss for a radio-frequency integrated passive device | Nov 25, 2014 | Issued |
Array
(
[id] => 10237432
[patent_doc_number] => 20150122426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING'
[patent_app_type] => utility
[patent_app_number] => 14/550008
[patent_app_country] => US
[patent_app_date] => 2014-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 13509
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14550008
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/550008 | MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING | Nov 20, 2014 | Abandoned |