Search

Laura Mary Menz

Examiner (ID: 16260)

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2273
Issued Applications
1951
Pending Applications
152
Abandoned Applications
215

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11342775 [patent_doc_number] => 09527164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'High throughput laser processing' [patent_app_type] => utility [patent_app_number] => 14/491662 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4917 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491662 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491662
High throughput laser processing Sep 18, 2014 Issued
Array ( [id] => 10974871 [patent_doc_number] => 20140377906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'METHODS FOR MANUFACTURING THIN FILM TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 14/478124 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2928 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478124
Methods for manufacturing thin film transistors Sep 4, 2014 Issued
Array ( [id] => 10652365 [patent_doc_number] => 09368631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Thin film transistor and display panel including the same' [patent_app_type] => utility [patent_app_number] => 14/478148 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 2922 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478148 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478148
Thin film transistor and display panel including the same Sep 4, 2014 Issued
Array ( [id] => 10645531 [patent_doc_number] => 09362408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Thin film transistor and display panel including the same' [patent_app_type] => utility [patent_app_number] => 14/478172 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 2923 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478172 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478172
Thin film transistor and display panel including the same Sep 4, 2014 Issued
Array ( [id] => 10971801 [patent_doc_number] => 20140374836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'METHOD FOR IMPROVING DEVICE PERFORMANCE USING DUAL STRESS LINER BOUNDARY' [patent_app_type] => utility [patent_app_number] => 14/478144 [patent_app_country] => US [patent_app_date] => 2014-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3145 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14478144 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/478144
Method for improving device performance using dual stress liner boundary Sep 4, 2014 Issued
Array ( [id] => 10964724 [patent_doc_number] => 20140367756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'CAPACITOR OF NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/476446 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2074 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14476446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/476446
CAPACITOR OF NONVOLATILE MEMORY DEVICE Sep 2, 2014 Abandoned
Array ( [id] => 11010810 [patent_doc_number] => 20160207763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-21 [patent_title] => 'METHOD OF FORMING PLANAR SACRIFICIAL MATERIAL IN A MEMS DEVICE' [patent_app_type] => utility [patent_app_number] => 14/914504 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2661 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14914504 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/914504
Method of forming planar sacrificial material in a MEMS device Sep 1, 2014 Issued
Array ( [id] => 10495662 [patent_doc_number] => 20150380684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'PACKAGING STRUCTURE AND PACKAGING METHOD OF ORGANIC ELECTROLUMINESCENT DEVICE, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/436151 [patent_app_country] => US [patent_app_date] => 2014-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14436151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/436151
Packaging structure and packaging method of organic electroluminescent device, and display device Aug 26, 2014 Issued
Array ( [id] => 10939494 [patent_doc_number] => 20140342515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'ESD PROTECTION USING DIODE-ISOLATED GATE-GROUNDED NMOS WITH DIODE STRING' [patent_app_type] => utility [patent_app_number] => 14/453907 [patent_app_country] => US [patent_app_date] => 2014-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2507 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14453907 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/453907
ESD protection using diode-isolated gate-grounded nMOS with diode string Aug 6, 2014 Issued
Array ( [id] => 10936571 [patent_doc_number] => 20140339592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'LIGHT EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 14/449104 [patent_app_country] => US [patent_app_date] => 2014-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9097 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449104 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/449104
Light emitting diode Jul 30, 2014 Issued
Array ( [id] => 11770810 [patent_doc_number] => 09379522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-28 [patent_title] => 'Method of strain engineering and related optical device using a gallium and nitrogen containing active region' [patent_app_type] => utility [patent_app_number] => 14/444687 [patent_app_country] => US [patent_app_date] => 2014-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 18881 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14444687 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/444687
Method of strain engineering and related optical device using a gallium and nitrogen containing active region Jul 27, 2014 Issued
Array ( [id] => 10919864 [patent_doc_number] => 20140322883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'METHOD FOR FABRICATING METAL-OXIDE SEMICONDUCTOR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/331229 [patent_app_country] => US [patent_app_date] => 2014-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2491 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14331229 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/331229
Method for fabricating metal-oxide semiconductor transistor Jul 14, 2014 Issued
Array ( [id] => 10916673 [patent_doc_number] => 20140319692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-30 [patent_title] => 'Semiconductor Device and Method of Forming High Routing Density Interconnect Sites on Substrate' [patent_app_type] => utility [patent_app_number] => 14/329162 [patent_app_country] => US [patent_app_date] => 2014-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 19823 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14329162 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/329162
Semiconductor device and method of forming high routing density interconnect sites on substrate Jul 10, 2014 Issued
Array ( [id] => 9971649 [patent_doc_number] => 09018665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Semiconductor light emitting device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/326516 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3701 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14326516 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/326516
Semiconductor light emitting device and method for manufacturing the same Jul 8, 2014 Issued
Array ( [id] => 10212230 [patent_doc_number] => 20150097221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'POWER FET WITH A RESONANT TRANSISTOR GATE' [patent_app_type] => utility [patent_app_number] => 14/325129 [patent_app_country] => US [patent_app_date] => 2014-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10697 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14325129 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/325129
Power FET with a resonant transistor gate Jul 6, 2014 Issued
Array ( [id] => 11432203 [patent_doc_number] => 09570530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Active matrix organic light-emitting-diode display backboard and manufacturing method thereof, display device' [patent_app_type] => utility [patent_app_number] => 14/436237 [patent_app_country] => US [patent_app_date] => 2014-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3659 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14436237 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/436237
Active matrix organic light-emitting-diode display backboard and manufacturing method thereof, display device Jul 2, 2014 Issued
Array ( [id] => 10909487 [patent_doc_number] => 20140312504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-23 [patent_title] => 'INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG' [patent_app_type] => utility [patent_app_number] => 14/319284 [patent_app_country] => US [patent_app_date] => 2014-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3503 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14319284 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/319284
Interconnect line selectively isolated from an underlying contact plug Jun 29, 2014 Issued
Array ( [id] => 12498597 [patent_doc_number] => 09997493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Flexible-substrate-based three-dimensional packaging structure and method [patent_app_type] => utility [patent_app_number] => 15/036090 [patent_app_country] => US [patent_app_date] => 2014-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3290 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15036090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/036090
Flexible-substrate-based three-dimensional packaging structure and method Jun 11, 2014 Issued
Array ( [id] => 10778251 [patent_doc_number] => 20160124407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'An Apparatus and a System for Controlling Sensors' [patent_app_type] => utility [patent_app_number] => 14/893853 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4095 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14893853 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/893853
Apparatus and a system for controlling sensors May 27, 2014 Issued
Array ( [id] => 9682690 [patent_doc_number] => 20140239453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING' [patent_app_type] => utility [patent_app_number] => 14/273369 [patent_app_country] => US [patent_app_date] => 2014-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12894 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14273369 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/273369
Multiple bonding layers for thin-wafer handling May 7, 2014 Issued
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