
Laura Mary Menz
Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2324 |
| Issued Applications | 1995 |
| Pending Applications | 138 |
| Abandoned Applications | 216 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11346258
[patent_doc_number] => 09530674
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-27
[patent_title] => 'Method and system for three-dimensional (3D) structure fill'
[patent_app_type] => utility
[patent_app_number] => 14/044138
[patent_app_country] => US
[patent_app_date] => 2013-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 6574
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14044138
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/044138 | Method and system for three-dimensional (3D) structure fill | Oct 1, 2013 | Issued |
Array
(
[id] => 10638602
[patent_doc_number] => 09356114
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-31
[patent_title] => 'Lateral heterojunction bipolar transistor with low temperature recessed contacts'
[patent_app_type] => utility
[patent_app_number] => 14/042951
[patent_app_country] => US
[patent_app_date] => 2013-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 14
[patent_no_of_words] => 10524
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14042951
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/042951 | Lateral heterojunction bipolar transistor with low temperature recessed contacts | Sep 30, 2013 | Issued |
Array
(
[id] => 10638612
[patent_doc_number] => 09356124
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-31
[patent_title] => 'Method for fabricating multi-gate structure device with source and drain having quasi-SOI structure'
[patent_app_type] => utility
[patent_app_number] => 14/764155
[patent_app_country] => US
[patent_app_date] => 2013-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 22
[patent_no_of_words] => 3594
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 457
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764155
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/764155 | Method for fabricating multi-gate structure device with source and drain having quasi-SOI structure | Sep 29, 2013 | Issued |
Array
(
[id] => 10364009
[patent_doc_number] => 20150249014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-03
[patent_title] => 'PROCESS FOR PRODUCING A DOUBLE-GATE FIELD-EFFECT DEVICE HAVING INDEPENDENT GATES'
[patent_app_type] => utility
[patent_app_number] => 14/429153
[patent_app_country] => US
[patent_app_date] => 2013-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4300
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14429153
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/429153 | Process for producing a double-gate field-effect device having independent gates | Sep 17, 2013 | Issued |
Array
(
[id] => 10145118
[patent_doc_number] => 09177932
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-11-03
[patent_title] => 'Semiconductor device having overlapped via apertures'
[patent_app_type] => utility
[patent_app_number] => 14/028290
[patent_app_country] => US
[patent_app_date] => 2013-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14028290
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/028290 | Semiconductor device having overlapped via apertures | Sep 15, 2013 | Issued |
Array
(
[id] => 9360401
[patent_doc_number] => 20140070273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-13
[patent_title] => 'Non-Planar Device Having Uniaxially Strained Semiconductor Body and Method of Making Same'
[patent_app_type] => utility
[patent_app_number] => 14/018867
[patent_app_country] => US
[patent_app_date] => 2013-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4073
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14018867
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/018867 | Non-planar device having uniaxially strained semiconductor body and method of making same | Sep 4, 2013 | Issued |
Array
(
[id] => 9662919
[patent_doc_number] => 08809903
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Semiconductor device and power conversion apparatus using the same'
[patent_app_type] => utility
[patent_app_number] => 14/015213
[patent_app_country] => US
[patent_app_date] => 2013-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 5390
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14015213
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/015213 | Semiconductor device and power conversion apparatus using the same | Aug 29, 2013 | Issued |
Array
(
[id] => 9565751
[patent_doc_number] => 20140183464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-03
[patent_title] => 'ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/973275
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5600
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973275
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973275 | Organic light emitting diode display device and method of fabricating the same | Aug 21, 2013 | Issued |
Array
(
[id] => 9898880
[patent_doc_number] => 20150054079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-26
[patent_title] => 'Three-Dimensional Field-Effect Transistor on Bulk Silicon Substrate'
[patent_app_type] => utility
[patent_app_number] => 13/973107
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6532
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973107
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973107 | Three-dimensional field-effect transistor on bulk silicon substrate | Aug 21, 2013 | Issued |
Array
(
[id] => 10950816
[patent_doc_number] => 20140353837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/973114
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 11202
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973114
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973114 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | Aug 21, 2013 | Abandoned |
Array
(
[id] => 9542411
[patent_doc_number] => 20140167058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'COMPOSITIONALLY GRADED NITRIDE-BASED HIGH ELECTRON MOBILITY TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/973377
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1294
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973377
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973377 | COMPOSITIONALLY GRADED NITRIDE-BASED HIGH ELECTRON MOBILITY TRANSISTOR | Aug 21, 2013 | Abandoned |
Array
(
[id] => 9898845
[patent_doc_number] => 20150054044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-26
[patent_title] => 'Method to Form a Polysilicon Nanocrystal Thin Film Storage Bitcell within a High K Metal Gate Platform Technology Using a Gate Last Process to Form Transistor Gates'
[patent_app_type] => utility
[patent_app_number] => 13/973433
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 20355
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973433
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973433 | Method to form a polysilicon nanocrystal thin film storage bitcell within a high k metal gate platform technology using a gate last process to form transistor gates | Aug 21, 2013 | Issued |
Array
(
[id] => 9327803
[patent_doc_number] => 20140054585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'LATERAL SEMICONDUCTOR DEVICE WITH VERTICAL BREAKDOWN REGION'
[patent_app_type] => utility
[patent_app_number] => 13/973482
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2155
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973482
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973482 | Lateral semiconductor device with vertical breakdown region | Aug 21, 2013 | Issued |
Array
(
[id] => 9335107
[patent_doc_number] => 20140061889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'INTERFACIAL ALLOY LAYER FOR IMPROVING ELECTROMIGRATION (EM) RESISTANCE IN SOLDER JOINTS'
[patent_app_type] => utility
[patent_app_number] => 13/973434
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3070
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13973434
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/973434 | Interfacial alloy layer for improving electromigration (EM) resistance in solder joints | Aug 21, 2013 | Issued |
Array
(
[id] => 9418659
[patent_doc_number] => 20140103309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/970206
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7102
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970206
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/970206 | Organic light emitting display device and manufacturing method thereof | Aug 18, 2013 | Issued |
Array
(
[id] => 9654073
[patent_doc_number] => 20140225078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/970549
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8068
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970549
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/970549 | Organic light emitting display device | Aug 18, 2013 | Issued |
Array
(
[id] => 10611257
[patent_doc_number] => 09331304
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-03
[patent_title] => 'Organic light-emitting display device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/970270
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 12098
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970270
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/970270 | Organic light-emitting display device and method of manufacturing the same | Aug 18, 2013 | Issued |
Array
(
[id] => 10158589
[patent_doc_number] => 09190374
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-11-17
[patent_title] => 'Structure of a semiconductor chip with substrate via holes and metal bumps and a fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/968797
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 6187
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 276
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968797
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968797 | Structure of a semiconductor chip with substrate via holes and metal bumps and a fabrication method thereof | Aug 15, 2013 | Issued |
Array
(
[id] => 9729251
[patent_doc_number] => 20140264958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'SEMICONDUCTOR PACKAGE, FABRICATION METHOD THEREOF AND MOLDING COMPOUND'
[patent_app_type] => utility
[patent_app_number] => 13/968834
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1894
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13968834
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/968834 | SEMICONDUCTOR PACKAGE, FABRICATION METHOD THEREOF AND MOLDING COMPOUND | Aug 15, 2013 | Abandoned |
Array
(
[id] => 9893318
[patent_doc_number] => 20150048517
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-02-19
[patent_title] => 'CRACK STOPPING STRUCTURE IN WAFER LEVEL PACKAGING (WLP)'
[patent_app_type] => utility
[patent_app_number] => 13/969436
[patent_app_country] => US
[patent_app_date] => 2013-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10780
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13969436
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/969436 | Crack stopping structure in wafer level packaging (WLP) | Aug 15, 2013 | Issued |