Search

Laura Mary Menz

Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813
Total Applications
2324
Issued Applications
1995
Pending Applications
138
Abandoned Applications
216

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9440783 [patent_doc_number] => 08709893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Method of making a low-Rdson vertical power MOSFET device' [patent_app_type] => utility [patent_app_number] => 13/216122 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 39 [patent_no_of_words] => 6440 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216122 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216122
Method of making a low-Rdson vertical power MOSFET device Aug 22, 2011 Issued
Array ( [id] => 9524703 [patent_doc_number] => 08748980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'U-shape RESURF MOSFET devices and associated methods of manufacturing' [patent_app_type] => utility [patent_app_number] => 13/216187 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 3935 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216187 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216187
U-shape RESURF MOSFET devices and associated methods of manufacturing Aug 22, 2011 Issued
Array ( [id] => 8680790 [patent_doc_number] => 20130049074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'METHODS FOR FORMING CONNECTIONS TO A MEMORY ARRAY AND PERIPHERY' [patent_app_type] => utility [patent_app_number] => 13/216164 [patent_app_country] => US [patent_app_date] => 2011-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 5878 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13216164 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/216164
METHODS FOR FORMING CONNECTIONS TO A MEMORY ARRAY AND PERIPHERY Aug 22, 2011 Abandoned
Array ( [id] => 9440723 [patent_doc_number] => 08709832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Chip on film (COF) package having test line for testing electrical function of chip and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 13/212527 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6490 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212527
Chip on film (COF) package having test line for testing electrical function of chip and method for manufacturing same Aug 17, 2011 Issued
Array ( [id] => 7651385 [patent_doc_number] => 20110300654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'Method of manufacturing semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 13/137374 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3472 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20110300654.pdf [firstpage_image] =>[orig_patent_app_number] => 13137374 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137374
Method of manufacturing semiconductor light emitting device Aug 9, 2011 Issued
Array ( [id] => 7577310 [patent_doc_number] => 20110291192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'INCREASING BODY DOPANT UNIFORMITY IN MULTI-GATE TRANSISTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 13/205002 [patent_app_country] => US [patent_app_date] => 2011-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4807 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291192.pdf [firstpage_image] =>[orig_patent_app_number] => 13205002 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/205002
INCREASING BODY DOPANT UNIFORMITY IN MULTI-GATE TRANSISTOR DEVICES Aug 7, 2011 Abandoned
Array ( [id] => 10537680 [patent_doc_number] => 09263314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Multiple bonding layers for thin-wafer handling' [patent_app_type] => utility [patent_app_number] => 13/198294 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12885 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198294 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198294
Multiple bonding layers for thin-wafer handling Aug 3, 2011 Issued
Array ( [id] => 10537680 [patent_doc_number] => 09263314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Multiple bonding layers for thin-wafer handling' [patent_app_type] => utility [patent_app_number] => 13/198294 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12885 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198294 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198294
Multiple bonding layers for thin-wafer handling Aug 3, 2011 Issued
Array ( [id] => 7561358 [patent_doc_number] => 20110275191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'Method of Manufacturing Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 13/186803 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 21773 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20110275191.pdf [firstpage_image] =>[orig_patent_app_number] => 13186803 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/186803
Method of manufacturing semiconductor device Jul 19, 2011 Issued
Array ( [id] => 8846819 [patent_doc_number] => 08456006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Hybrid interconnect structure for performance improvement and reliability enhancement' [patent_app_type] => utility [patent_app_number] => 13/174841 [patent_app_country] => US [patent_app_date] => 2011-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174841
Hybrid interconnect structure for performance improvement and reliability enhancement Jun 30, 2011 Issued
Array ( [id] => 8582853 [patent_doc_number] => 20130001674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'SEMICONDUCTOR DEVICE WITH VOLTAGE COMPENSATION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/174319 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7715 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174319 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174319
Semiconductor device with voltage compensation structure Jun 29, 2011 Issued
Array ( [id] => 7805296 [patent_doc_number] => 20120056248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'ONE-TRANSISTOR PIXEL ARRAY' [patent_app_type] => utility [patent_app_number] => 13/174207 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13961 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20120056248.pdf [firstpage_image] =>[orig_patent_app_number] => 13174207 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174207
One-transistor pixel array Jun 29, 2011 Issued
Array ( [id] => 7706512 [patent_doc_number] => 20120001237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'TWO-TRANSISTOR PIXEL ARRAY' [patent_app_type] => utility [patent_app_number] => 13/174222 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13955 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174222
Two-transistor pixel array Jun 29, 2011 Issued
Array ( [id] => 7506654 [patent_doc_number] => 20110254068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/172398 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12810 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254068.pdf [firstpage_image] =>[orig_patent_app_number] => 13172398 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172398
Semiconductor device and manufacturing method thereof Jun 28, 2011 Issued
Array ( [id] => 7511010 [patent_doc_number] => 20110256720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'Techniques for Impeding Reverse Engineering' [patent_app_type] => utility [patent_app_number] => 13/169248 [patent_app_country] => US [patent_app_date] => 2011-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6424 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256720.pdf [firstpage_image] =>[orig_patent_app_number] => 13169248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/169248
Techniques for impeding reverse engineering Jun 26, 2011 Issued
Array ( [id] => 7506690 [patent_doc_number] => 20110254089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF FABRICATING SAME' [patent_app_type] => utility [patent_app_number] => 13/169518 [patent_app_country] => US [patent_app_date] => 2011-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8913 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254089.pdf [firstpage_image] =>[orig_patent_app_number] => 13169518 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/169518
SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF FABRICATING SAME Jun 26, 2011 Abandoned
Array ( [id] => 8807713 [patent_doc_number] => 08445365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Single scan irradiation for crystallization of thin films' [patent_app_type] => utility [patent_app_number] => 13/165369 [patent_app_country] => US [patent_app_date] => 2011-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 10454 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13165369 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/165369
Single scan irradiation for crystallization of thin films Jun 20, 2011 Issued
Array ( [id] => 8064705 [patent_doc_number] => 20110244672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/164479 [patent_app_country] => US [patent_app_date] => 2011-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3610 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20110244672.pdf [firstpage_image] =>[orig_patent_app_number] => 13164479 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/164479
Method of manufacturing semiconductor device Jun 19, 2011 Issued
Array ( [id] => 8508645 [patent_doc_number] => 20120308053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'Plate, Transducer and Methods for Making and Operating a Transducer' [patent_app_type] => utility [patent_app_number] => 13/150972 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4662 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150972 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150972
Plate, transducer and methods for making and operating a transducer May 31, 2011 Issued
Array ( [id] => 6010626 [patent_doc_number] => 20110221023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS FOR FORMING PATTERNED RADIATION BLOCKING ON A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/113638 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4893 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20110221023.pdf [firstpage_image] =>[orig_patent_app_number] => 13113638 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/113638
Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device May 22, 2011 Issued
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