
Laura Mary Menz
Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2324 |
| Issued Applications | 1995 |
| Pending Applications | 138 |
| Abandoned Applications | 216 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5060332
[patent_doc_number] => 20070221969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/709975
[patent_app_country] => US
[patent_app_date] => 2007-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6923
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221969.pdf
[firstpage_image] =>[orig_patent_app_number] => 11709975
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/709975 | Semiconductor device and method of manufacturing the same | Feb 21, 2007 | Issued |
Array
(
[id] => 5019590
[patent_doc_number] => 20070145556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Techniques for packaging multiple device components'
[patent_app_type] => utility
[patent_app_number] => 11/708196
[patent_app_country] => US
[patent_app_date] => 2007-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4363
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20070145556.pdf
[firstpage_image] =>[orig_patent_app_number] => 11708196
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/708196 | Techniques for packaging multiple device components | Feb 19, 2007 | Issued |
Array
(
[id] => 197542
[patent_doc_number] => 07638846
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-29
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/703667
[patent_app_country] => US
[patent_app_date] => 2007-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 29
[patent_no_of_words] => 12892
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 285
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/638/07638846.pdf
[firstpage_image] =>[orig_patent_app_number] => 11703667
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/703667 | Semiconductor device and manufacturing method thereof | Feb 7, 2007 | Issued |
Array
(
[id] => 8305787
[patent_doc_number] => 08227322
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-24
[patent_title] => 'Methods of growing nitride-based film using varying pulses'
[patent_app_type] => utility
[patent_app_number] => 11/671784
[patent_app_country] => US
[patent_app_date] => 2007-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3436
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11671784
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/671784 | Methods of growing nitride-based film using varying pulses | Feb 5, 2007 | Issued |
Array
(
[id] => 7518796
[patent_doc_number] => 07972897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-05
[patent_title] => 'Methods for forming resistive switching memory elements'
[patent_app_type] => utility
[patent_app_number] => 11/702966
[patent_app_country] => US
[patent_app_date] => 2007-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 23
[patent_no_of_words] => 9956
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/972/07972897.pdf
[firstpage_image] =>[orig_patent_app_number] => 11702966
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/702966 | Methods for forming resistive switching memory elements | Feb 4, 2007 | Issued |
Array
(
[id] => 5095736
[patent_doc_number] => 20070117345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-24
[patent_title] => 'METHODS OF FABRICATING HIGHLY CONDUCTIVE REGIONS IN SEMICONDUCTOR SUBSTRATES FOR RADIO FREQUENCY APPLICATIONS'
[patent_app_type] => utility
[patent_app_number] => 11/626255
[patent_app_country] => US
[patent_app_date] => 2007-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2068
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20070117345.pdf
[firstpage_image] =>[orig_patent_app_number] => 11626255
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/626255 | Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications | Jan 22, 2007 | Issued |
Array
(
[id] => 4762808
[patent_doc_number] => 20080174017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'HYBRID INTERCONNECT STRUCTURE FOR PERFORMANCE IMPROVEMENT AND RELIABILITY ENHANCEMENT'
[patent_app_type] => utility
[patent_app_number] => 11/625576
[patent_app_country] => US
[patent_app_date] => 2007-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5567
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20080174017.pdf
[firstpage_image] =>[orig_patent_app_number] => 11625576
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/625576 | Hybrid interconnect structure for performance improvement and reliability enhancement | Jan 21, 2007 | Issued |
Array
(
[id] => 173747
[patent_doc_number] => 07659126
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-02-09
[patent_title] => 'Electrical test method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/625546
[patent_app_country] => US
[patent_app_date] => 2007-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4146
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/659/07659126.pdf
[firstpage_image] =>[orig_patent_app_number] => 11625546
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/625546 | Electrical test method and apparatus | Jan 21, 2007 | Issued |
Array
(
[id] => 7530394
[patent_doc_number] => 07842616
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-30
[patent_title] => 'Methods for fabricating semiconductor structures'
[patent_app_type] => utility
[patent_app_number] => 11/625585
[patent_app_country] => US
[patent_app_date] => 2007-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 48
[patent_no_of_words] => 9756
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/842/07842616.pdf
[firstpage_image] =>[orig_patent_app_number] => 11625585
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/625585 | Methods for fabricating semiconductor structures | Jan 21, 2007 | Issued |
Array
(
[id] => 274177
[patent_doc_number] => 07560341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-14
[patent_title] => 'Semiconductor device and manufacturing method therefor'
[patent_app_type] => utility
[patent_app_number] => 11/624346
[patent_app_country] => US
[patent_app_date] => 2007-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 6750
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/560/07560341.pdf
[firstpage_image] =>[orig_patent_app_number] => 11624346
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/624346 | Semiconductor device and manufacturing method therefor | Jan 17, 2007 | Issued |
Array
(
[id] => 5336220
[patent_doc_number] => 20090052684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-26
[patent_title] => 'AUDIO CONFERENCING APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 12/162934
[patent_app_country] => US
[patent_app_date] => 2007-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8453
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20090052684.pdf
[firstpage_image] =>[orig_patent_app_number] => 12162934
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/162934 | Audio conferencing apparatus | Jan 16, 2007 | Issued |
Array
(
[id] => 5002651
[patent_doc_number] => 20070200217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component'
[patent_app_type] => utility
[patent_app_number] => 11/653304
[patent_app_country] => US
[patent_app_date] => 2007-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 20498
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0200/20070200217.pdf
[firstpage_image] =>[orig_patent_app_number] => 11653304
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/653304 | Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component | Jan 15, 2007 | Abandoned |
Array
(
[id] => 141902
[patent_doc_number] => 07691690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-06
[patent_title] => 'Methods for forming dual fully silicided gates over fins of FinFet devices'
[patent_app_type] => utility
[patent_app_number] => 11/622586
[patent_app_country] => US
[patent_app_date] => 2007-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2400
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/691/07691690.pdf
[firstpage_image] =>[orig_patent_app_number] => 11622586
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/622586 | Methods for forming dual fully silicided gates over fins of FinFet devices | Jan 11, 2007 | Issued |
Array
(
[id] => 5085441
[patent_doc_number] => 20070275492
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-29
[patent_title] => 'HYBRID INTEGRATION BASED ON WAFER-BONDING OF DEVICES TO AISb MONOLITHICALLY GROWN ON Si'
[patent_app_type] => utility
[patent_app_number] => 11/622306
[patent_app_country] => US
[patent_app_date] => 2007-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4395
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0275/20070275492.pdf
[firstpage_image] =>[orig_patent_app_number] => 11622306
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/622306 | Hybrid integration based on wafer-bonding of devices to AlSb monolithically grown on Si | Jan 10, 2007 | Issued |
Array
(
[id] => 4749334
[patent_doc_number] => 20080157405
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'CHIP STACK WITH PRECISION ALIGNMENT, HIGH YIELD ASSEMBLY AND THERMAL CONDUCTIVITY'
[patent_app_type] => utility
[patent_app_number] => 11/619265
[patent_app_country] => US
[patent_app_date] => 2007-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2487
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20080157405.pdf
[firstpage_image] =>[orig_patent_app_number] => 11619265
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/619265 | CHIP STACK WITH PRECISION ALIGNMENT, HIGH YIELD ASSEMBLY AND THERMAL CONDUCTIVITY | Jan 2, 2007 | Abandoned |
Array
(
[id] => 7530347
[patent_doc_number] => 07842569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-30
[patent_title] => 'Flash memory device and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/618155
[patent_app_country] => US
[patent_app_date] => 2006-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4699
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/842/07842569.pdf
[firstpage_image] =>[orig_patent_app_number] => 11618155
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618155 | Flash memory device and method of fabricating the same | Dec 28, 2006 | Issued |
Array
(
[id] => 4749100
[patent_doc_number] => 20080157171
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'DIELECTRIC BARRIER FOR NANOCRYSTALS'
[patent_app_type] => utility
[patent_app_number] => 11/618666
[patent_app_country] => US
[patent_app_date] => 2006-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4772
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20080157171.pdf
[firstpage_image] =>[orig_patent_app_number] => 11618666
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/618666 | Dielectric barrier for nanocrystals | Dec 28, 2006 | Issued |
Array
(
[id] => 5005087
[patent_doc_number] => 20070202657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'METHOD FOR FABRICATING CAPACITOR IN SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/617675
[patent_app_country] => US
[patent_app_date] => 2006-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3995
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0202/20070202657.pdf
[firstpage_image] =>[orig_patent_app_number] => 11617675
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/617675 | Method for fabricating capacitor in semiconductor device | Dec 27, 2006 | Issued |
Array
(
[id] => 5225200
[patent_doc_number] => 20070254466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/647745
[patent_app_country] => US
[patent_app_date] => 2006-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2362
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0254/20070254466.pdf
[firstpage_image] =>[orig_patent_app_number] => 11647745
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647745 | Method for fabricating semiconductor device | Dec 27, 2006 | Issued |
Array
(
[id] => 5186129
[patent_doc_number] => 20070164436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'DUAL METAL INTERCONNECTION'
[patent_app_type] => utility
[patent_app_number] => 11/617366
[patent_app_country] => US
[patent_app_date] => 2006-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1888
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20070164436.pdf
[firstpage_image] =>[orig_patent_app_number] => 11617366
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/617366 | Dual metal interconnection | Dec 27, 2006 | Issued |