
Laura Mary Menz
Examiner (ID: 7325, Phone: (571)272-1697 , Office: P/2813 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813 |
| Total Applications | 2324 |
| Issued Applications | 1995 |
| Pending Applications | 138 |
| Abandoned Applications | 216 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[id] => 5912979
[patent_doc_number] => 20060128041
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[patent_issue_date] => 2006-06-15
[patent_title] => 'Misalignment test structure and method thereof'
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[patent_app_number] => 11/339687
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339687 | Misalignment test structure and method thereof | Jan 25, 2006 | Issued |
Array
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[patent_title] => 'Processing system and method for treating a substrate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/337654 | Processing system and method for treating a substrate | Jan 23, 2006 | Issued |
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[patent_issue_date] => 2010-07-13
[patent_title] => 'Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/335503 | Method of manufacturing silicon optoelectronic device, silicon optoelectronic device manufactured by the method, and image input and/or output apparatus using the silicon optoelectronic device | Jan 19, 2006 | Issued |
Array
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[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Post thermal treatment methods of forming high dielectric layers over interfacial layers in integrated circuit devices'
[patent_app_type] => utility
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[patent_title] => 'Method for manufacturing semiconductor thin film'
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[patent_title] => 'Substrate processing apparatus and substrate processing method'
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[patent_title] => 'Method for manufacturing a semiconductor thin film'
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Array
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[id] => 5116864
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[patent_issue_date] => 2007-06-21
[patent_title] => 'Metal oxynitride as a pFET material'
[patent_app_type] => utility
[patent_app_number] => 11/311455
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[firstpage_image] =>[orig_patent_app_number] => 11311455
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/311455 | Metal oxynitride as a pFET material | Dec 18, 2005 | Issued |
Array
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[id] => 928490
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[patent_title] => 'Application of different isolation schemes for logic and embedded memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/296164 | Application of different isolation schemes for logic and embedded memory | Dec 6, 2005 | Issued |
Array
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[patent_title] => 'Post high voltage gate oxide pattern high-vacuum outgas surface treatment'
[patent_app_type] => utility
[patent_app_number] => 11/292883
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Array
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Array
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Array
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Array
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Array
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Array
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Array
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