Lauren R. Bell

Array ( [id] => 14573745 [patent_doc_number] => 20190214480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => FABRICATING METHOD OF SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/357333 [patent_app_country] => US [patent_app_date] => 2019-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16286416 [patent_doc_number] => 20200280018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => OLED WITH PASS-THROUGH HOLE [patent_app_type] => utility [patent_app_number] => 16/289305 [patent_app_country] => US [patent_app_date] => 2019-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15841597 [patent_doc_number] => 20200136081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => ELECTRODE EXHAUST STRUCTURE, ELECTRODE, DISPLAY PANEL AND MANUFACTURING METHOD THEREFOR, AND DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/608493 [patent_app_country] => US [patent_app_date] => 2019-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16608493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15442857 [patent_doc_number] => 20200035612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/254007 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16254007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18000858 [patent_doc_number] => 11501969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Direct extreme ultraviolet lithography on hard mask with reverse tone [patent_app_type] => utility [patent_app_number] => 16/253429 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 5445 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15625541 [patent_doc_number] => 20200083175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/253540 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16194218 [patent_doc_number] => 20200235067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => ELECTRONIC DEVICE FLIP CHIP PACKAGE WITH EXPOSED CLIP [patent_app_type] => utility [patent_app_number] => 16/253680 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17893286 [patent_doc_number] => 11456268 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/252734 [patent_app_country] => US [patent_app_date] => 2019-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 12183 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16252734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15873415 [patent_doc_number] => 20200144111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => METAL INTERCONNECTION STRUCTURE AND METHOD FOR FABRICATING SAME [patent_app_type] => utility [patent_app_number] => 16/250594 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17410213 [patent_doc_number] => 11251110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Semiconductor device and method of manufacturing the semiconductor device [patent_app_type] => utility [patent_app_number] => 16/250464 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4380 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16020927 [patent_doc_number] => 20200185307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/250676 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16194156 [patent_doc_number] => 20200235005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => APPARATUS WITH MULTIDIELECTRIC SPACERS ON CONDUCTIVE REGIONS OF STACK STRUCTURES, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/251063 [patent_app_country] => US [patent_app_date] => 2019-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16251063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16180438 [patent_doc_number] => 20200227407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => INTEGRATION OF III-N TRANSISTORS AND POLYSILICON RESISTORS [patent_app_type] => utility [patent_app_number] => 16/249256 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16249256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17232411 [patent_doc_number] => 20210358968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/631198 [patent_app_country] => US [patent_app_date] => 2019-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16631198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14285541 [patent_doc_number] => 20190140055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => SEMICONDUCTOR DEVICE, RELATED MANUFACTURING METHOD, AND RELATED ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/242283 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6814 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16242283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16163325 [patent_doc_number] => 20200219895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A REPLACEMENT BURIED SOURCE LINE AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/241171 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16163277 [patent_doc_number] => 20200219871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => Electronic Device Including a HEMT Including a Buried Region [patent_app_type] => utility [patent_app_number] => 16/241172 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16241172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17493513 [patent_doc_number] => 11282830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => High voltage ESD protection apparatus [patent_app_type] => utility [patent_app_number] => 16/227726 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14191541 [patent_doc_number] => 20190115476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => TRANSISTOR, DISPLAY UNIT, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/213715 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16402562 [patent_doc_number] => 20200343420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => LIGHT-EMITTING SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A LIGHT-EMITTING SEMICONDUCTOR COMPONENT [patent_app_type] => utility [patent_app_number] => 16/769586 [patent_app_country] => US [patent_app_date] => 2018-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16769586 [rel_patent_id] =>[rel_patent_doc_number] =>)