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Lawrence Baranyai

Examiner (ID: 12458)

Most Active Art Unit
2665
Art Unit(s)
2665
Total Applications
1
Issued Applications
1
Pending Applications
0
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17269290 [patent_doc_number] => 11194717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Facts control and evaluating card definitions using cached facts [patent_app_type] => utility [patent_app_number] => 16/389528 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 13632 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389528 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389528
Facts control and evaluating card definitions using cached facts Apr 18, 2019 Issued
Array ( [id] => 16478292 [patent_doc_number] => 10853240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Memory system for performing a different program operation based on a size of data and an operating method thereof [patent_app_type] => utility [patent_app_number] => 16/389418 [patent_app_country] => US [patent_app_date] => 2019-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 12061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389418 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/389418
Memory system for performing a different program operation based on a size of data and an operating method thereof Apr 18, 2019 Issued
Array ( [id] => 16346341 [patent_doc_number] => 20200310992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => Gather-Scatter Cache Architecture For Single Program Multiple Data (SPMD) Processor [patent_app_type] => utility [patent_app_number] => 16/364725 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364725
Gather-scatter cache architecture having plurality of tag and data banks and arbiter for single program multiple data (SPMD) processor Mar 25, 2019 Issued
Array ( [id] => 16314464 [patent_doc_number] => 20200293202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => APPARATUS AND METHOD OF AUTOMATIC CONFIGURATION OF STORAGE SPACE [patent_app_type] => utility [patent_app_number] => 16/354809 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354809
APPARATUS AND METHOD OF AUTOMATIC CONFIGURATION OF STORAGE SPACE Mar 14, 2019 Abandoned
Array ( [id] => 17308880 [patent_doc_number] => 11209990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-28 [patent_title] => Apparatus and method of allocating data segments in storage regions of group of storage units [patent_app_type] => utility [patent_app_number] => 16/354803 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 19434 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354803 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354803
Apparatus and method of allocating data segments in storage regions of group of storage units Mar 14, 2019 Issued
Array ( [id] => 16299856 [patent_doc_number] => 20200285579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => PROGRAMMABLE DATA DELIVERY TO A SYSTEM OF SHARED PROCESSING ELEMENTS WITH SHARED MEMORY [patent_app_type] => utility [patent_app_number] => 16/295408 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5743 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/295408
Programmable data delivery by load and store agents on a processing chip interfacing with on-chip memory components and directing data to external memory components Mar 6, 2019 Issued
Array ( [id] => 16255417 [patent_doc_number] => 20200264791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => SECURITY AND SELECTIVE DATA DESTRUCTION [patent_app_type] => utility [patent_app_number] => 16/276999 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16276999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/276999
Selective data destruction via a sanitizing wipe command Feb 14, 2019 Issued
Array ( [id] => 16186109 [patent_doc_number] => 10719441 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-21 [patent_title] => Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests [patent_app_type] => utility [patent_app_number] => 16/274146 [patent_app_country] => US [patent_app_date] => 2019-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12947 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16274146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/274146
Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests Feb 11, 2019 Issued
Array ( [id] => 16178897 [patent_doc_number] => 20200225865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SERVER AND ASSOCIATED COMPUTER PROGRAM PRODUCT USING DIFFERENT TRANMISSION SPEED FOR COLD DATA TANSMISSION [patent_app_type] => utility [patent_app_number] => 16/261467 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261467 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/261467
Server and associated computer program product using different tranmission speed for cold data tansmission Jan 28, 2019 Issued
Array ( [id] => 16986999 [patent_doc_number] => 11074172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => On-device-copy for hybrid SSD with second persistent storage media update of logical block address for first persistent storage media data [patent_app_type] => utility [patent_app_number] => 16/244285 [patent_app_country] => US [patent_app_date] => 2019-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 9876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16244285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/244285
On-device-copy for hybrid SSD with second persistent storage media update of logical block address for first persistent storage media data Jan 9, 2019 Issued
Array ( [id] => 14689323 [patent_doc_number] => 20190243777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => COMPUTER PRODUCT, METHOD, AND SYSTEM TO PROVIDE A VIRTUAL TARGET TO VIRTUALIZE TARGET SYSTEM STORAGE RESOURCES AS VIRTUAL TARGET STORAGE RESOURCES [patent_app_type] => utility [patent_app_number] => 16/240705 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16240705 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/240705
Management of virtual target storage resources by use of an access control list and input/output queues Jan 3, 2019 Issued
Array ( [id] => 14282241 [patent_doc_number] => 20190138405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => Data Loading Method and Apparatus [patent_app_type] => utility [patent_app_number] => 16/238093 [patent_app_country] => US [patent_app_date] => 2019-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16238093 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/238093
Method and apparatus for loading data from a mirror server and a non-transitory computer readable storage medium Jan 1, 2019 Issued
Array ( [id] => 14218689 [patent_doc_number] => 20190121729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => WRITE CACHE SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 16/220941 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/220941
Write cache system and method for data chunk bypass and acknowledgment of write of data chunk Dec 13, 2018 Issued
Array ( [id] => 16265996 [patent_doc_number] => 10757452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Prefetcher with adaptive stream segment prefetch window based on different demand at different times [patent_app_type] => utility [patent_app_number] => 16/215816 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/215816
Prefetcher with adaptive stream segment prefetch window based on different demand at different times Dec 10, 2018 Issued
Array ( [id] => 16263135 [patent_doc_number] => 10754567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Partially deactivated application with termination protection [patent_app_type] => utility [patent_app_number] => 16/203557 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10385 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203557 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203557
Partially deactivated application with termination protection Nov 27, 2018 Issued
Array ( [id] => 16802127 [patent_doc_number] => 10997071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Write width aligned storage device buffer flush [patent_app_type] => utility [patent_app_number] => 16/201537 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10423 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201537 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201537
Write width aligned storage device buffer flush Nov 26, 2018 Issued
Array ( [id] => 15966669 [patent_doc_number] => 20200167086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => EXIT-LESS HOST PAGE TABLE SWITCHING AND VIRTUAL MACHINE FUNCTION DETECTION [patent_app_type] => utility [patent_app_number] => 16/201526 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6920 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201526
Exit-less host page table switching and virtual machine function detection with memory pages storing an identification value that are mapped at the same guest physical addresses Nov 26, 2018 Issued
Array ( [id] => 15837197 [patent_doc_number] => 20200133881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHODS AND SYSTEMS FOR OPTIMIZED TRANSLATION LOOKASIDE BUFFER (TLB) LOOKUPS FOR VARIABLE PAGE SIZES [patent_app_type] => utility [patent_app_number] => 16/173397 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16173397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/173397
Methods and systems for optimized translation of a virtual address having multiple virtual address portions using multiple translation lookaside buffer (TLB) arrays for variable page sizes Oct 28, 2018 Issued
Array ( [id] => 14782005 [patent_doc_number] => 20190265900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => MEMORY DEVICE, MEMORY CONTROLLER AND MEMORY SYSTEM INCLUDING THEM, AND METHOD FOR OPERATING THEM [patent_app_type] => utility [patent_app_number] => 16/169203 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/169203
Memory device, memory controller and memory system including them, and method for operating them for matching operation mode of memory interfaces Oct 23, 2018 Issued
Array ( [id] => 15638327 [patent_doc_number] => 10592157 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Merging data from single-level cell block to multiple-level cell block using scrambler with different seeds [patent_app_type] => utility [patent_app_number] => 16/161900 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7404 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161900 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161900
Merging data from single-level cell block to multiple-level cell block using scrambler with different seeds Oct 15, 2018 Issued
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