
Lawrence C. Tynes Jr.
Examiner (ID: 16074, Phone: (571)270-7606 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2899, 2822, 2816, 4191 |
| Total Applications | 1026 |
| Issued Applications | 836 |
| Pending Applications | 80 |
| Abandoned Applications | 120 |
Applications
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|---|---|---|---|
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