
Lawrence C. Tynes Jr.
Examiner (ID: 17069, Phone: (571)270-7606 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2822, 2899, 4191, 2816 |
| Total Applications | 982 |
| Issued Applications | 796 |
| Pending Applications | 106 |
| Abandoned Applications | 117 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16827809
[patent_doc_number] => 20210143102
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-13
[patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/922163
[patent_app_country] => US
[patent_app_date] => 2020-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8779
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922163
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/922163 | Semiconductor device and semiconductor package including the same | Jul 6, 2020 | Issued |
Array
(
[id] => 18548320
[patent_doc_number] => 11721681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-08
[patent_title] => Micro LED display having multi-color pixel array and method of fabricating the same based on integration with driving circuit thereof
[patent_app_type] => utility
[patent_app_number] => 16/913593
[patent_app_country] => US
[patent_app_date] => 2020-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5807
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16913593
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/913593 | Micro LED display having multi-color pixel array and method of fabricating the same based on integration with driving circuit thereof | Jun 25, 2020 | Issued |
Array
(
[id] => 17886555
[patent_doc_number] => 20220302033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => MOLDED SILICON INTERCONNECTS IN BRIDGES FOR INTEGRATED-CIRCUIT PACKAGES
[patent_app_type] => utility
[patent_app_number] => 17/631254
[patent_app_country] => US
[patent_app_date] => 2020-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8592
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17631254
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/631254 | Molded silicon interconnects in bridges for integrated-circuit packages | Jun 25, 2020 | Issued |
Array
(
[id] => 17559183
[patent_doc_number] => 11315905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-26
[patent_title] => Semiconductor packages including a bonding wire branch structure
[patent_app_type] => utility
[patent_app_number] => 16/910821
[patent_app_country] => US
[patent_app_date] => 2020-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 8014
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910821
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/910821 | Semiconductor packages including a bonding wire branch structure | Jun 23, 2020 | Issued |
Array
(
[id] => 18016358
[patent_doc_number] => 11508665
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Packages with thick RDLs and thin RDLs stacked alternatingly
[patent_app_type] => utility
[patent_app_number] => 16/909517
[patent_app_country] => US
[patent_app_date] => 2020-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 27
[patent_no_of_words] => 7247
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909517
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/909517 | Packages with thick RDLs and thin RDLs stacked alternatingly | Jun 22, 2020 | Issued |
Array
(
[id] => 17353211
[patent_doc_number] => 11227858
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-18
[patent_title] => Semiconductor package including stacked semiconductor chips
[patent_app_type] => utility
[patent_app_number] => 16/901891
[patent_app_country] => US
[patent_app_date] => 2020-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 10705
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 257
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901891
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/901891 | Semiconductor package including stacked semiconductor chips | Jun 14, 2020 | Issued |
Array
(
[id] => 16796091
[patent_doc_number] => 20210125908
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/946209
[patent_app_country] => US
[patent_app_date] => 2020-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8493
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946209
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/946209 | Semiconductor package and method of manufacturing the same | Jun 9, 2020 | Issued |
Array
(
[id] => 17284098
[patent_doc_number] => 11201140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Semiconductor packages including stacked sub-packages with interposing bridges
[patent_app_type] => utility
[patent_app_number] => 16/893117
[patent_app_country] => US
[patent_app_date] => 2020-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 23
[patent_no_of_words] => 11862
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893117
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/893117 | Semiconductor packages including stacked sub-packages with interposing bridges | Jun 3, 2020 | Issued |
Array
(
[id] => 16752471
[patent_doc_number] => 20210104483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-08
[patent_title] => SEMICONDUCTOR PACKAGES
[patent_app_type] => utility
[patent_app_number] => 16/885748
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10713
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885748
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/885748 | Semiconductor packages | May 27, 2020 | Issued |
Array
(
[id] => 16487812
[patent_doc_number] => 20200381421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-03
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/884167
[patent_app_country] => US
[patent_app_date] => 2020-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8542
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884167
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/884167 | Semiconductor device | May 26, 2020 | Issued |
Array
(
[id] => 17326472
[patent_doc_number] => 11217497
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-04
[patent_title] => Integrated circuit package and method
[patent_app_type] => utility
[patent_app_number] => 16/882995
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 11852
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882995
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882995 | Integrated circuit package and method | May 25, 2020 | Issued |
Array
(
[id] => 17247044
[patent_doc_number] => 20210366789
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => PRECISION THIN ELECTRONICS HANDLING INTEGRATION
[patent_app_type] => utility
[patent_app_number] => 16/882624
[patent_app_country] => US
[patent_app_date] => 2020-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10310
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882624
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882624 | Precision thin electronics handling integration | May 24, 2020 | Issued |
Array
(
[id] => 17247069
[patent_doc_number] => 20210366814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => Giga Interposer Integration through Chip-On-Wafer-On-Substrate
[patent_app_type] => utility
[patent_app_number] => 16/881211
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7385
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16881211
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/881211 | Giga interposer integration through chip-on-wafer-on-substrate | May 21, 2020 | Issued |
Array
(
[id] => 16301112
[patent_doc_number] => 20200286835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-10
[patent_title] => Semiconductor Device and Method of Forming an Integrated SIP Module with Embedded Inductor or Package
[patent_app_type] => utility
[patent_app_number] => 16/880173
[patent_app_country] => US
[patent_app_date] => 2020-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6120
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16880173
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/880173 | Semiconductor device and method of forming an integrated SiP module with embedded inductor or package | May 20, 2020 | Issued |
Array
(
[id] => 17536855
[patent_doc_number] => 20220115464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-14
[patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/278816
[patent_app_country] => US
[patent_app_date] => 2020-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10291
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17278816
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/278816 | Display device and method for manufacturing the same, and electronic apparatus | May 17, 2020 | Issued |
Array
(
[id] => 16677486
[patent_doc_number] => 20210066252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => STACKED DIE STRUCTURE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/876108
[patent_app_country] => US
[patent_app_date] => 2020-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7817
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876108
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/876108 | Stacked die structure and method of fabricating the same | May 16, 2020 | Issued |
Array
(
[id] => 18016400
[patent_doc_number] => 11508707
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-22
[patent_title] => Semiconductor package with dummy MIM capacitor die
[patent_app_type] => utility
[patent_app_number] => 16/869574
[patent_app_country] => US
[patent_app_date] => 2020-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3692
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869574
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/869574 | Semiconductor package with dummy MIM capacitor die | May 6, 2020 | Issued |
Array
(
[id] => 18481239
[patent_doc_number] => 11694994
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-04
[patent_title] => Semiconductor chip stack structure, semiconductor package, and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/865649
[patent_app_country] => US
[patent_app_date] => 2020-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 11758
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 518
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865649
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/865649 | Semiconductor chip stack structure, semiconductor package, and method of manufacturing the same | May 3, 2020 | Issued |
Array
(
[id] => 16256704
[patent_doc_number] => 20200266079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => SUBSTRATE LIQUID PROCESSING APPARATUS, SUBSTRATE LIQUID PROCESSING METHOD AND STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 16/865452
[patent_app_country] => US
[patent_app_date] => 2020-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8304
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865452
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/865452 | Substrate liquid processing apparatus, substrate liquid processing method and storage medium | May 3, 2020 | Issued |
Array
(
[id] => 19215293
[patent_doc_number] => 12004380
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-04
[patent_title] => Organic light-emitting diode display device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/964802
[patent_app_country] => US
[patent_app_date] => 2020-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 6698
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16964802
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/964802 | Organic light-emitting diode display device and manufacturing method thereof | Apr 29, 2020 | Issued |