Search

Lawrence C. Tynes Jr.

Examiner (ID: 16074, Phone: (571)270-7606 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2822, 2816, 4191
Total Applications
1026
Issued Applications
836
Pending Applications
80
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15274171 [patent_doc_number] => 20190385820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => APPARATUS AND METHOD FOR DEPOSITION AND ETCH IN GAP FILL [patent_app_type] => utility [patent_app_number] => 16/453237 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453237
Apparatus and method for deposition and etch in gap fill Jun 25, 2019 Issued
Array ( [id] => 17590651 [patent_doc_number] => 11328928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Conformal high concentration boron doping of semiconductors [patent_app_type] => utility [patent_app_number] => 16/444856 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4223 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444856 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444856
Conformal high concentration boron doping of semiconductors Jun 17, 2019 Issued
Array ( [id] => 16080615 [patent_doc_number] => 20200194294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SPECTROSCOPIC SYSTEM, OPTICAL INSPECTION METHOD, AND SEMICONDUCTOR DEVICE FABRICATION METHOD [patent_app_type] => utility [patent_app_number] => 16/444378 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7011 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444378 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444378
SPECTROSCOPIC SYSTEM, OPTICAL INSPECTION METHOD, AND SEMICONDUCTOR DEVICE FABRICATION METHOD Jun 17, 2019 Abandoned
Array ( [id] => 15274347 [patent_doc_number] => 20190385908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => Treatment And Doping Of Barrier Layers [patent_app_type] => utility [patent_app_number] => 16/442941 [patent_app_country] => US [patent_app_date] => 2019-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8015 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16442941 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/442941
Treatment And Doping Of Barrier Layers Jun 16, 2019 Abandoned
Array ( [id] => 14904481 [patent_doc_number] => 20190296006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/441361 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441361
Semiconductor integrated circuit device Jun 13, 2019 Issued
Array ( [id] => 16512092 [patent_doc_number] => 20200391349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => Method and Tool to Improve Efficiency and Effectiveness of Waterjet De-burr Process [patent_app_type] => utility [patent_app_number] => 16/442316 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16442316 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/442316
Method and tool to improve efficiency and effectiveness of waterjet de-burr process Jun 13, 2019 Issued
Array ( [id] => 15840545 [patent_doc_number] => 20200135555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD FOR FORMING AN INTERCONNECT STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/438875 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438875 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438875
Method for forming an interconnect structure Jun 11, 2019 Issued
Array ( [id] => 16911430 [patent_doc_number] => 11043480 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-22 [patent_title] => Forming and/or configuring stacked dies [patent_app_type] => utility [patent_app_number] => 16/437498 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 8195 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437498 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/437498
Forming and/or configuring stacked dies Jun 10, 2019 Issued
Array ( [id] => 14875641 [patent_doc_number] => 20190288062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/428369 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428369
Semiconductor device May 30, 2019 Issued
Array ( [id] => 16684481 [patent_doc_number] => 10943972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Precision BEOL resistors [patent_app_type] => utility [patent_app_number] => 16/419619 [patent_app_country] => US [patent_app_date] => 2019-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7594 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16419619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/419619
Precision BEOL resistors May 21, 2019 Issued
Array ( [id] => 14716533 [patent_doc_number] => 20190249330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => METHOD OF MANUFACTURING CZ SILICON WAFERS, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/369419 [patent_app_country] => US [patent_app_date] => 2019-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16369419 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/369419
Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device Mar 28, 2019 Issued
Array ( [id] => 16459899 [patent_doc_number] => 10843227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => CMOS ultrasonic transducers and related apparatus and methods [patent_app_type] => utility [patent_app_number] => 16/364388 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 50 [patent_no_of_words] => 10799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364388
CMOS ultrasonic transducers and related apparatus and methods Mar 25, 2019 Issued
Array ( [id] => 16249396 [patent_doc_number] => 10748771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Apparatus for processing a substrate and display device by using the same [patent_app_type] => utility [patent_app_number] => 16/283392 [patent_app_country] => US [patent_app_date] => 2019-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 10542 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16283392 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/283392
Apparatus for processing a substrate and display device by using the same Feb 21, 2019 Issued
Array ( [id] => 19830037 [patent_doc_number] => 12250844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/419896 [patent_app_country] => US [patent_app_date] => 2019-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 20038 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17419896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/419896
Display device Feb 18, 2019 Issued
Array ( [id] => 16163145 [patent_doc_number] => 20200219805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => DISPLAY TRACE STRUCTURE AND DISPLAY PANEL STRUCTURE THEREOF [patent_app_type] => utility [patent_app_number] => 16/613435 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16613435 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/613435
DISPLAY TRACE STRUCTURE AND DISPLAY PANEL STRUCTURE THEREOF Feb 14, 2019 Abandoned
Array ( [id] => 16132853 [patent_doc_number] => 10700195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Reduced resistance source and drain extensions in vertical field effect transistors [patent_app_type] => utility [patent_app_number] => 16/276118 [patent_app_country] => US [patent_app_date] => 2019-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5112 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16276118 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/276118
Reduced resistance source and drain extensions in vertical field effect transistors Feb 13, 2019 Issued
Array ( [id] => 15442715 [patent_doc_number] => 20200035541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => SEMICONDUCTOR DEVICE FOR IMPROVING DEVICE CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 16/258815 [patent_app_country] => US [patent_app_date] => 2019-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258815 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258815
Semiconductor device for improving device characteristics Jan 27, 2019 Issued
Array ( [id] => 16433068 [patent_doc_number] => 10833167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Fin field effect transistor (finFET) device structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/258408 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 42 [patent_no_of_words] => 6573 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258408
Fin field effect transistor (finFET) device structure and method for forming the same Jan 24, 2019 Issued
Array ( [id] => 14573419 [patent_doc_number] => 20190214317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 16/253109 [patent_app_country] => US [patent_app_date] => 2019-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/253109
Semiconductor device and method Jan 20, 2019 Issued
Array ( [id] => 16001013 [patent_doc_number] => 20200176377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/251858 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16251858 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/251858
ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME Jan 17, 2019 Abandoned
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