Search

Lawrence C. Tynes Jr.

Examiner (ID: 16074, Phone: (571)270-7606 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2822, 2816, 4191
Total Applications
1026
Issued Applications
836
Pending Applications
80
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16464072 [patent_doc_number] => 10847432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Display device including a test unit [patent_app_type] => utility [patent_app_number] => 15/693567 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 12244 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693567 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693567
Display device including a test unit Aug 31, 2017 Issued
Array ( [id] => 15139501 [patent_doc_number] => 10483236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/693370 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3842 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693370 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693370
Semiconductor device Aug 30, 2017 Issued
Array ( [id] => 12122215 [patent_doc_number] => 20180005801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'APPARATUS AND METHOD FOR DEPOSITION AND ETCH IN GAP FILL' [patent_app_type] => utility [patent_app_number] => 15/683397 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12928 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683397 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683397
Apparatus and method for deposition and etch in gap fill Aug 21, 2017 Issued
Array ( [id] => 12918304 [patent_doc_number] => 20180197944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => LEAKAGE CURRENT REDUCTION IN STACKED METAL-INSULATOR-METAL CAPACITORS [patent_app_type] => utility [patent_app_number] => 15/673559 [patent_app_country] => US [patent_app_date] => 2017-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673559
Leakage current reduction in stacked metal-insulator-metal capacitors Aug 9, 2017 Issued
Array ( [id] => 12516438 [patent_doc_number] => 10002947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-19 [patent_title] => FinFETs with vertical fins and methods for forming the same [patent_app_type] => utility [patent_app_number] => 15/651418 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 3491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15651418 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/651418
FinFETs with vertical fins and methods for forming the same Jul 16, 2017 Issued
Array ( [id] => 12129180 [patent_doc_number] => 20180012767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/642251 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10719 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15642251 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/642251
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Jul 4, 2017 Abandoned
Array ( [id] => 12129368 [patent_doc_number] => 20180012954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'PROCESS OF FORMING CAPACITOR' [patent_app_type] => utility [patent_app_number] => 15/641681 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4500 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641681 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641681
Process of forming capacitor Jul 4, 2017 Issued
Array ( [id] => 13769631 [patent_doc_number] => 10177165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-08 [patent_title] => Method for fabricating merging semiconductor integrated circuit [patent_app_type] => utility [patent_app_number] => 15/641560 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3247 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641560 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641560
Method for fabricating merging semiconductor integrated circuit Jul 4, 2017 Issued
Array ( [id] => 12778855 [patent_doc_number] => 20180151453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 15/640942 [patent_app_country] => US [patent_app_date] => 2017-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640942 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640942
Semiconductor device and method Jul 2, 2017 Issued
Array ( [id] => 14252353 [patent_doc_number] => 10276383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Apparatus for processing a substrate and display device by using the same [patent_app_type] => utility [patent_app_number] => 15/640951 [patent_app_country] => US [patent_app_date] => 2017-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 10386 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640951 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640951
Apparatus for processing a substrate and display device by using the same Jul 2, 2017 Issued
Array ( [id] => 12262078 [patent_doc_number] => 20180081275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'EXPOSURE APPARATUS, EXPOSURE METHOD, AND DEVICE MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 15/640488 [patent_app_country] => US [patent_app_date] => 2017-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11924 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640488 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640488
Exposure apparatus, exposure method, and device manufacturing method Jun 30, 2017 Issued
Array ( [id] => 13613341 [patent_doc_number] => 20180358220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => METAL DOPED CARBON BASED HARD MASK REMOVAL IN SEMICONDUCTOR FABRICATION [patent_app_type] => utility [patent_app_number] => 15/640345 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640345 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640345
Metal doped carbon based hard mask removal in semiconductor fabrication Jun 29, 2017 Issued
Array ( [id] => 12154667 [patent_doc_number] => 20180025930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'CONTROL OF WAFER BOW IN MULTIPLE STATIONS' [patent_app_type] => utility [patent_app_number] => 15/640053 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 26198 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640053 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640053
Control of water bow in multiple stations Jun 29, 2017 Issued
Array ( [id] => 13893429 [patent_doc_number] => 10199267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Tungsten nitride barrier layer deposition [patent_app_type] => utility [patent_app_number] => 15/640068 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640068 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640068
Tungsten nitride barrier layer deposition Jun 29, 2017 Issued
Array ( [id] => 12119240 [patent_doc_number] => 20180002826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'METHOD OF MANUFACTURING CZ SILICON WAFERS, AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/636926 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9480 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636926 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636926
Method of manufacturing CZ silicon wafers, and method of manufacturing a semiconductor device Jun 28, 2017 Issued
Array ( [id] => 14920437 [patent_doc_number] => 10431545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Cross-connected multi-chip modules coupled by silicon bent-bridge interconnects and methods of assembling same [patent_app_type] => utility [patent_app_number] => 15/637641 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 8357 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637641 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637641
Cross-connected multi-chip modules coupled by silicon bent-bridge interconnects and methods of assembling same Jun 28, 2017 Issued
Array ( [id] => 12129191 [patent_doc_number] => 20180012777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'SUBSTRATE LIQUID PROCESSING APPARATUS, SUBSTRATE LIQUID PROCESSING METHOD AND STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 15/636069 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8419 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636069 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636069
Substrate liquid processing apparatus, substrate liquid processing method and storage medium Jun 27, 2017 Issued
Array ( [id] => 12122561 [patent_doc_number] => 20180006147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Method of Manufacturing a Super Junction Semiconductor Device and Super Junction Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 15/635821 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7852 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635821 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635821
Method of manufacturing a super junction semiconductor device and super junction semiconductor device Jun 27, 2017 Issued
Array ( [id] => 12334791 [patent_doc_number] => 09947598 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-17 [patent_title] => Determining crackstop strength of integrated circuit assembly at the wafer level [patent_app_type] => utility [patent_app_number] => 15/634237 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634237 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634237
Determining crackstop strength of integrated circuit assembly at the wafer level Jun 26, 2017 Issued
Array ( [id] => 12095539 [patent_doc_number] => 20170352632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'Connector Formation Methods and Packaged Semiconductor Devices' [patent_app_type] => utility [patent_app_number] => 15/633660 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633660 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633660
Connector formation methods and packaged semiconductor devices Jun 25, 2017 Issued
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