Search

Lawrence E. Anderson

Examiner (ID: 14377)

Most Active Art Unit
2308
Art Unit(s)
2308, 2301, 2302
Total Applications
332
Issued Applications
188
Pending Applications
0
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2741589 [patent_doc_number] => 05040108 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-13 [patent_title] => 'Information processing system having microprogram-controlled type arithmetic processing unit with clock synchronization instruction' [patent_app_type] => 1 [patent_app_number] => 7/513228 [patent_app_country] => US [patent_app_date] => 1990-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2627 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/040/05040108.pdf [firstpage_image] =>[orig_patent_app_number] => 513228 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/513228
Information processing system having microprogram-controlled type arithmetic processing unit with clock synchronization instruction Apr 22, 1990 Issued
07/510219 METHOD AND SYSTEM FOR LIMITED PROGRAM UTILIZATION PERIOD IN COMPUTER Apr 17, 1990 Abandoned
Array ( [id] => 2955543 [patent_doc_number] => 05224214 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-29 [patent_title] => 'BuIffet for gathering write requests and resolving read conflicts by matching read and write requests' [patent_app_type] => 1 [patent_app_number] => 7/508335 [patent_app_country] => US [patent_app_date] => 1990-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 7 [patent_no_of_words] => 8988 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/224/05224214.pdf [firstpage_image] =>[orig_patent_app_number] => 508335 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/508335
BuIffet for gathering write requests and resolving read conflicts by matching read and write requests Apr 11, 1990 Issued
Array ( [id] => 2588603 [patent_doc_number] => 04974158 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Multiple sequentially transferrable stackpointers in a data processor in a pipelining system' [patent_app_type] => 1 [patent_app_number] => 7/506498 [patent_app_country] => US [patent_app_date] => 1990-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1905 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974158.pdf [firstpage_image] =>[orig_patent_app_number] => 506498 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/506498
Multiple sequentially transferrable stackpointers in a data processor in a pipelining system Apr 8, 1990 Issued
Array ( [id] => 2588310 [patent_doc_number] => 04974143 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Information processing apparatus wherein address path is used for continuous data transfer' [patent_app_type] => 1 [patent_app_number] => 7/507085 [patent_app_country] => US [patent_app_date] => 1990-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3785 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974143.pdf [firstpage_image] =>[orig_patent_app_number] => 507085 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/507085
Information processing apparatus wherein address path is used for continuous data transfer Apr 4, 1990 Issued
Array ( [id] => 2905491 [patent_doc_number] => 05210870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-11 [patent_title] => 'Database sort and merge apparatus with multiple memory arrays having alternating access' [patent_app_type] => 1 [patent_app_number] => 7/499844 [patent_app_country] => US [patent_app_date] => 1990-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 21641 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/210/05210870.pdf [firstpage_image] =>[orig_patent_app_number] => 499844 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/499844
Database sort and merge apparatus with multiple memory arrays having alternating access Mar 26, 1990 Issued
07/490113 MULTI-SEGMENTED BUS AND METHOD OF OPERATION Mar 5, 1990 Abandoned
Array ( [id] => 2756979 [patent_doc_number] => 05038275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-06 [patent_title] => 'Status transfer structure within a data processing system with status read indication' [patent_app_type] => 1 [patent_app_number] => 7/475514 [patent_app_country] => US [patent_app_date] => 1990-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4959 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/038/05038275.pdf [firstpage_image] =>[orig_patent_app_number] => 475514 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/475514
Status transfer structure within a data processing system with status read indication Mar 1, 1990 Issued
07/489768 METHOD AND ARRANGEMENT FOR DATA TRANSMISSION, AS WELL AS A STATION TO IMPLEMENT THE METHOD Feb 25, 1990 Abandoned
Array ( [id] => 2861084 [patent_doc_number] => 05089955 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-18 [patent_title] => 'Programmable counter/timer device with programmable registers having programmable functions' [patent_app_type] => 1 [patent_app_number] => 7/484909 [patent_app_country] => US [patent_app_date] => 1990-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6718 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/089/05089955.pdf [firstpage_image] =>[orig_patent_app_number] => 484909 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/484909
Programmable counter/timer device with programmable registers having programmable functions Feb 25, 1990 Issued
Array ( [id] => 2705920 [patent_doc_number] => 04991134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Concurrent sorting apparatus and method using FIFO stacks' [patent_app_type] => 1 [patent_app_number] => 7/483286 [patent_app_country] => US [patent_app_date] => 1990-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3923 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991134.pdf [firstpage_image] =>[orig_patent_app_number] => 483286 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/483286
Concurrent sorting apparatus and method using FIFO stacks Feb 19, 1990 Issued
07/478043 COMPACT HYPHENATION POINT DATA Feb 5, 1990 Abandoned
Array ( [id] => 2817416 [patent_doc_number] => 05146596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Multiprocessor multifunction arbitration system with two levels of bus access including priority and normal requests' [patent_app_type] => 1 [patent_app_number] => 7/471904 [patent_app_country] => US [patent_app_date] => 1990-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3592 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146596.pdf [firstpage_image] =>[orig_patent_app_number] => 471904 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/471904
Multiprocessor multifunction arbitration system with two levels of bus access including priority and normal requests Jan 28, 1990 Issued
Array ( [id] => 2833259 [patent_doc_number] => 05095526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'Microprocessor with improved interrupt response with interrupt data saving dependent upon processor status' [patent_app_type] => 1 [patent_app_number] => 7/471091 [patent_app_country] => US [patent_app_date] => 1990-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4637 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/095/05095526.pdf [firstpage_image] =>[orig_patent_app_number] => 471091 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/471091
Microprocessor with improved interrupt response with interrupt data saving dependent upon processor status Jan 25, 1990 Issued
Array ( [id] => 2989016 [patent_doc_number] => 05226162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Assist program for operating a debug program in conjunction with a user program' [patent_app_type] => 1 [patent_app_number] => 7/468162 [patent_app_country] => US [patent_app_date] => 1990-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2597 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/226/05226162.pdf [firstpage_image] =>[orig_patent_app_number] => 468162 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/468162
Assist program for operating a debug program in conjunction with a user program Jan 21, 1990 Issued
Array ( [id] => 2589316 [patent_doc_number] => 04974197 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Batching data objects for recording on optical disks with maximum object count' [patent_app_type] => 1 [patent_app_number] => 7/464684 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5399 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974197.pdf [firstpage_image] =>[orig_patent_app_number] => 464684 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/464684
Batching data objects for recording on optical disks with maximum object count Jan 15, 1990 Issued
07/460211 DATA PROCESSOR WITH MICROCODE MEMORY COMPRESSION Jan 1, 1990 Abandoned
07/462932 STATE MACHINE BUS CONTROLLER Jan 1, 1990 Abandoned
Array ( [id] => 2765230 [patent_doc_number] => 05043868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-08-27 [patent_title] => 'System for by-pass control in pipeline operation of computer' [patent_app_type] => 1 [patent_app_number] => 7/453193 [patent_app_country] => US [patent_app_date] => 1989-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 2264 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/043/05043868.pdf [firstpage_image] =>[orig_patent_app_number] => 453193 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/453193
System for by-pass control in pipeline operation of computer Dec 18, 1989 Issued
Array ( [id] => 2817452 [patent_doc_number] => 05146598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Communication terminal apparatus having an interrupt/restart function with time measuring control for interruption and disabling feature' [patent_app_type] => 1 [patent_app_number] => 7/450512 [patent_app_country] => US [patent_app_date] => 1989-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3712 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146598.pdf [firstpage_image] =>[orig_patent_app_number] => 450512 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/450512
Communication terminal apparatus having an interrupt/restart function with time measuring control for interruption and disabling feature Dec 13, 1989 Issued
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