Search

Le Hien Luu

Examiner (ID: 18957)

Most Active Art Unit
2448
Art Unit(s)
2446, 2441, 2454, 2756, 2755, 2152, 2317, 2782, 2448, 2141
Total Applications
1776
Issued Applications
1464
Pending Applications
111
Abandoned Applications
204

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18312224 [patent_doc_number] => 20230116124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => MANGANESE OR SCANDIUM DOPED FERROELECTRIC PLANAR DEVICE AND DIFFERENTIAL BIT-CELL [patent_app_type] => utility [patent_app_number] => 18/048019 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048019 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048019
MANGANESE OR SCANDIUM DOPED FERROELECTRIC PLANAR DEVICE AND DIFFERENTIAL BIT-CELL Oct 18, 2022 Pending
Array ( [id] => 19116618 [patent_doc_number] => 20240128368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => RF Power Transistor Having Off-Axis Layout [patent_app_type] => utility [patent_app_number] => 17/965753 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 438 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965753 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965753
RF power transistor having off-axis layout Oct 12, 2022 Issued
Array ( [id] => 18145913 [patent_doc_number] => 20230019769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SEMICONDUCTOR DEVICE WITH SiC SEMICONDUCTOR LAYER AND RAISED PORTION GROUP [patent_app_type] => utility [patent_app_number] => 17/954049 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954049
Semiconductor device with sic semiconductor layer and raised portion group Sep 26, 2022 Issued
Array ( [id] => 19071397 [patent_doc_number] => 20240105823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => Barrier Structure for Dispersion Reduction in Transistor Devices [patent_app_type] => utility [patent_app_number] => 17/951708 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11862 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951708 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951708
Barrier Structure for Dispersion Reduction in Transistor Devices Sep 22, 2022 Pending
Array ( [id] => 19071398 [patent_doc_number] => 20240105824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => Barrier Structure for Sub-100 Nanometer Gate Length Devices [patent_app_type] => utility [patent_app_number] => 17/951711 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951711 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951711
Barrier Structure for Sub-100 Nanometer Gate Length Devices Sep 22, 2022 Pending
Array ( [id] => 18868058 [patent_doc_number] => 20230422495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/945077 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945077 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945077
MEMORY STRUCTURE Sep 13, 2022 Abandoned
Array ( [id] => 18208765 [patent_doc_number] => 20230055024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE [patent_app_type] => utility [patent_app_number] => 17/931770 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931770
SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE Sep 12, 2022 Pending
Array ( [id] => 18113099 [patent_doc_number] => 20230005979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/939796 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939796 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939796
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF Sep 6, 2022 Abandoned
Array ( [id] => 19023290 [patent_doc_number] => 20240079461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => VERTICAL TRANSISTOR WITH SELF- ALIGN BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 17/823969 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823969 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823969
VERTICAL TRANSISTOR WITH SELF- ALIGN BACKSIDE CONTACT Aug 31, 2022 Issued
Array ( [id] => 20205608 [patent_doc_number] => 12408404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Method for manufacturing semiconductor device, semiconductor device, inverter circuit, driving device, vehicle, and elevator [patent_app_type] => utility [patent_app_number] => 17/822970 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 48 [patent_no_of_words] => 9047 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822970
Method for manufacturing semiconductor device, semiconductor device, inverter circuit, driving device, vehicle, and elevator Aug 28, 2022 Issued
Array ( [id] => 18661486 [patent_doc_number] => 20230307500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/892809 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4900 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892809
METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE Aug 21, 2022 Pending
Array ( [id] => 18198311 [patent_doc_number] => 20230051830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF [patent_app_type] => utility [patent_app_number] => 17/886533 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886533 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886533
SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF Aug 11, 2022 Pending
Array ( [id] => 19342644 [patent_doc_number] => 12052851 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Integrated circuit structure for low power SRAM [patent_app_type] => utility [patent_app_number] => 17/885166 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885166
Integrated circuit structure for low power SRAM Aug 9, 2022 Issued
Array ( [id] => 18177551 [patent_doc_number] => 20230038280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SILICON CARBIDE MOSFET DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/881736 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881736 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881736
Silicon carbide MOSFET device and manufacturing method thereof Aug 4, 2022 Issued
Array ( [id] => 18024591 [patent_doc_number] => 20220376090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Conformal Transfer Doping Method for Fin-Like Field Effect Transistor [patent_app_type] => utility [patent_app_number] => 17/815857 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815857
Conformal transfer doping method for fin-like field effect transistor Jul 27, 2022 Issued
Array ( [id] => 18823080 [patent_doc_number] => 20230397421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES [patent_app_type] => utility [patent_app_number] => 17/876271 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13941 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876271 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876271
MEMORY DEVICE INCLUDING PREFORMED RECESSES BETWEEN CONTACT STRUCTURES AND CONTROL GATES Jul 27, 2022 Pending
Array ( [id] => 20305425 [patent_doc_number] => 12451425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Semiconductor element with resistive layers having different resistance values [patent_app_type] => utility [patent_app_number] => 17/874901 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6743 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874901 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874901
Semiconductor element with resistive layers having different resistance values Jul 26, 2022 Issued
Array ( [id] => 20441476 [patent_doc_number] => 12512318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Method for selectively forming hard mask [patent_app_type] => utility [patent_app_number] => 17/871659 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 8753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871659
Method for selectively forming hard mask Jul 21, 2022 Issued
Array ( [id] => 18161810 [patent_doc_number] => 20230028402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/868806 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868806 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868806
Semiconductor device having semiconductor column portions Jul 19, 2022 Issued
Array ( [id] => 18857235 [patent_doc_number] => 11854828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor device having metal gate and poly gate [patent_app_type] => utility [patent_app_number] => 17/850643 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850643
Semiconductor device having metal gate and poly gate Jun 26, 2022 Issued
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