Search

Lee A. Fineman

Supervisory Patent Examiner (ID: 14813, Phone: (571)272-2313 , Office: P/2800 )

Most Active Art Unit
2872
Art Unit(s)
2872, 2800
Total Applications
580
Issued Applications
325
Pending Applications
25
Abandoned Applications
230

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8686667 [patent_doc_number] => 20130054951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SOFTWARE EXECUTION METHOD AND ELECTRONIC DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/459251 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3962 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/459251
SOFTWARE EXECUTION METHOD AND ELECTRONIC DEVICE USING THE SAME Apr 29, 2012 Abandoned
Array ( [id] => 10342440 [patent_doc_number] => 20150227445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'SYSTEMS AND METHODS FOR CORRELATING BATTERY POWER DRAW AND EVENTS IN BATTERY-OPERATED COMPUTING DEVICES' [patent_app_type] => utility [patent_app_number] => 13/453397 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6896 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453397 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453397
SYSTEMS AND METHODS FOR CORRELATING BATTERY POWER DRAW AND EVENTS IN BATTERY-OPERATED COMPUTING DEVICES Apr 22, 2012 Abandoned
Array ( [id] => 9105181 [patent_doc_number] => 20130278312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'SYNCHRONIZATION OF MULTIPLE SIGNAL CONVERTERS' [patent_app_type] => utility [patent_app_number] => 13/453401 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4747 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13453401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/453401
Synchronization of multiple signal converters by transmitting signal conversion data and receiving unique correction values for the respective counters through the same data interface pins Apr 22, 2012 Issued
Array ( [id] => 8524861 [patent_doc_number] => 20120324269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'MICROCONTROLLER AND METHOD FOR CONTROLLING POWER INDICATOR' [patent_app_type] => utility [patent_app_number] => 13/452961 [patent_app_country] => US [patent_app_date] => 2012-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2034 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13452961 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/452961
MICROCONTROLLER AND METHOD FOR CONTROLLING POWER INDICATOR Apr 22, 2012 Abandoned
Array ( [id] => 8466915 [patent_doc_number] => 20120272083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'IMAGE PROCESSING APPARATUS, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 13/452188 [patent_app_country] => US [patent_app_date] => 2012-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6312 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13452188 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/452188
IMAGE PROCESSING APPARATUS, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM Apr 19, 2012 Abandoned
Array ( [id] => 8672462 [patent_doc_number] => 20130047000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'INTEGRATED CIRCUIT ALLOWING FOR TESTING AND ISOLATION OF INTEGRATED POWER MANAGEMENT UNIT' [patent_app_type] => utility [patent_app_number] => 13/437675 [patent_app_country] => US [patent_app_date] => 2012-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13437675 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/437675
Integrated circuit allowing to test a power management unit based on or more conditions and configuring the plurality of pins to operate in normal and test mode Apr 1, 2012 Issued
Array ( [id] => 10834730 [patent_doc_number] => 08862923 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-14 [patent_title] => 'Method and apparatus to determine an idle state of a device set based on availability requirements corresponding to the device set' [patent_app_type] => utility [patent_app_number] => 13/436778 [patent_app_country] => US [patent_app_date] => 2012-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6704 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13436778 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/436778
Method and apparatus to determine an idle state of a device set based on availability requirements corresponding to the device set Mar 29, 2012 Issued
Array ( [id] => 9599147 [patent_doc_number] => 20140195828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'DYNAMICALLY MEASURING POWER CONSUMPTION IN A PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/996266 [patent_app_country] => US [patent_app_date] => 2012-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6160 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13996266 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/996266
Dynamically measuring power consumption in a processor Mar 29, 2012 Issued
Array ( [id] => 11488343 [patent_doc_number] => 09594412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Controlling power gate circuitry based on dynamic capacitance of a circuit' [patent_app_type] => utility [patent_app_number] => 13/996285 [patent_app_country] => US [patent_app_date] => 2012-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8090 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13996285 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/996285
Controlling power gate circuitry based on dynamic capacitance of a circuit Mar 29, 2012 Issued
Array ( [id] => 9056855 [patent_doc_number] => 20130254569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'INDIVIDUAL CORE VOLTAGE MARGINING' [patent_app_type] => utility [patent_app_number] => 13/991577 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2403 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13991577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/991577
Individual core voltage margining Dec 28, 2011 Issued
Array ( [id] => 10166708 [patent_doc_number] => 09197949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-24 [patent_title] => 'Self-organizing multiple appliance network connectivity apparatus for controlling plurality of appliances' [patent_app_type] => utility [patent_app_number] => 13/306976 [patent_app_country] => US [patent_app_date] => 2011-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5998 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 600 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306976 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/306976
Self-organizing multiple appliance network connectivity apparatus for controlling plurality of appliances Nov 28, 2011 Issued
Array ( [id] => 11803913 [patent_doc_number] => 09544854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Apparatus and method for reducing current consumption in a portable terminal' [patent_app_type] => utility [patent_app_number] => 13/304949 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4118 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304949 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304949
Apparatus and method for reducing current consumption in a portable terminal Nov 27, 2011 Issued
Array ( [id] => 8843348 [patent_doc_number] => 20130138976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'PROCESSOR, CONTROLLER, AND INPUT/OUTPUT DEVICE POWER REDUCTION AND OPTIMIZATION' [patent_app_type] => utility [patent_app_number] => 13/304898 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2609 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304898 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304898
Input/output device power reduction and optimization by enablement or disablement of an external circuit coupled to the input/output device Nov 27, 2011 Issued
Array ( [id] => 8383300 [patent_doc_number] => 20120226925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'METHOD FOR SWITCHING OPERATING SYSTEM AND ELECTRONIC APPARATUS USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/304402 [patent_app_country] => US [patent_app_date] => 2011-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5700 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304402
Method and apparatus for switching an operating system by determining whether a boot-up mode is a general mode or a switch mode Nov 23, 2011 Issued
Array ( [id] => 8672474 [patent_doc_number] => 20130047012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'Apparatus and Method for Entering Low Power Mode Based on Process, Voltage, and Temperature Considerations' [patent_app_type] => utility [patent_app_number] => 13/303922 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13303922 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/303922
Apparatus and method to update a default time interval based on process corner, temperature and voltage Nov 22, 2011 Issued
Array ( [id] => 14093019 [patent_doc_number] => 10242418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Reconfigurable graphics processor for performance improvement [patent_app_type] => utility [patent_app_number] => 13/993696 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3102 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993696 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/993696
Reconfigurable graphics processor for performance improvement Nov 20, 2011 Issued
Array ( [id] => 8349191 [patent_doc_number] => 20120210115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'Secure Boot Method and Method for Generating a Secure Boot Image' [patent_app_type] => utility [patent_app_number] => 13/279512 [patent_app_country] => US [patent_app_date] => 2011-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13091 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13279512 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/279512
Method for generating a secured boot image including an update boot loader for a secured update of the version information Oct 23, 2011 Issued
Array ( [id] => 8143411 [patent_doc_number] => 20120096256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'MOBILE DEVICE AND METHOD FOR SUPPORTING HIBERNATION FUNCTION' [patent_app_type] => utility [patent_app_number] => 13/276718 [patent_app_country] => US [patent_app_date] => 2011-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4607 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096256.pdf [firstpage_image] =>[orig_patent_app_number] => 13276718 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/276718
Method and device for performing data synchronization of a snapshot image by selectively reloading data from nonvolatile to volatile memory after wakeup from hibernation Oct 18, 2011 Issued
Array ( [id] => 12011328 [patent_doc_number] => 09804646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Host controlled IO power management' [patent_app_type] => utility [patent_app_number] => 13/995591 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2907 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13995591 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/995591
Host controlled IO power management Oct 16, 2011 Issued
Array ( [id] => 9392401 [patent_doc_number] => 08689023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Digital logic controller for regulating voltage of a system on chip' [patent_app_type] => utility [patent_app_number] => 13/275310 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 9146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275310 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275310
Digital logic controller for regulating voltage of a system on chip Oct 16, 2011 Issued
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