Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3114164
[patent_doc_number] => 05448517
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-05
[patent_title] => 'Electrically programmable nonvolatile semiconductor memory device with NAND cell structure'
[patent_app_type] => 1
[patent_app_number] => 8/288219
[patent_app_country] => US
[patent_app_date] => 1994-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 47
[patent_no_of_words] => 13546
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/448/05448517.pdf
[firstpage_image] =>[orig_patent_app_number] => 288219
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/288219 | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure | Aug 8, 1994 | Issued |
Array
(
[id] => 3422136
[patent_doc_number] => 05444659
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Semiconductor memory device having means for monitoring bias voltage'
[patent_app_type] => 1
[patent_app_number] => 8/288221
[patent_app_country] => US
[patent_app_date] => 1994-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1875
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[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/444/05444659.pdf
[firstpage_image] =>[orig_patent_app_number] => 288221
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/288221 | Semiconductor memory device having means for monitoring bias voltage | Aug 8, 1994 | Issued |
90/003525 | SEMICONDUCTOR MEMORY DEVICE | Aug 8, 1994 | Issued |
Array
(
[id] => 3436971
[patent_doc_number] => 05455784
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Associative memory device with small memory cells selectively storing data bits and don\'t care bits'
[patent_app_type] => 1
[patent_app_number] => 8/288190
[patent_app_country] => US
[patent_app_date] => 1994-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 10841
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455784.pdf
[firstpage_image] =>[orig_patent_app_number] => 288190
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/288190 | Associative memory device with small memory cells selectively storing data bits and don't care bits | Aug 8, 1994 | Issued |
Array
(
[id] => 3467405
[patent_doc_number] => 05473568
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Read write memory with negative feedback-controlled dummy memory circuit'
[patent_app_type] => 1
[patent_app_number] => 8/287243
[patent_app_country] => US
[patent_app_date] => 1994-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2561
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 249
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473568.pdf
[firstpage_image] =>[orig_patent_app_number] => 287243
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/287243 | Read write memory with negative feedback-controlled dummy memory circuit | Aug 7, 1994 | Issued |
Array
(
[id] => 3574424
[patent_doc_number] => 05483495
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-09
[patent_title] => 'Semiconductor memory device having dummy digit lines'
[patent_app_type] => 1
[patent_app_number] => 8/285291
[patent_app_country] => US
[patent_app_date] => 1994-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2374
[patent_no_of_claims] => 7
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[patent_words_short_claim] => 141
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/483/05483495.pdf
[firstpage_image] =>[orig_patent_app_number] => 285291
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/285291 | Semiconductor memory device having dummy digit lines | Aug 2, 1994 | Issued |
Array
(
[id] => 3467419
[patent_doc_number] => 05473569
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Method for operating a flash memory'
[patent_app_type] => 1
[patent_app_number] => 8/283431
[patent_app_country] => US
[patent_app_date] => 1994-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3311
[patent_no_of_claims] => 14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473569.pdf
[firstpage_image] =>[orig_patent_app_number] => 283431
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/283431 | Method for operating a flash memory | Jul 31, 1994 | Issued |
Array
(
[id] => 3515410
[patent_doc_number] => 05515311
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'Method of driving ferroelectric memory'
[patent_app_type] => 1
[patent_app_number] => 8/278892
[patent_app_country] => US
[patent_app_date] => 1994-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 25
[patent_no_of_words] => 5000
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/515/05515311.pdf
[firstpage_image] =>[orig_patent_app_number] => 278892
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/278892 | Method of driving ferroelectric memory | Jul 21, 1994 | Issued |
Array
(
[id] => 3452384
[patent_doc_number] => 05467314
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Method of testing an address multiplexed dynamic RAM'
[patent_app_type] => 1
[patent_app_number] => 8/277430
[patent_app_country] => US
[patent_app_date] => 1994-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5547
[patent_no_of_claims] => 2
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467314.pdf
[firstpage_image] =>[orig_patent_app_number] => 277430
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/277430 | Method of testing an address multiplexed dynamic RAM | Jul 17, 1994 | Issued |
Array
(
[id] => 3120505
[patent_doc_number] => 05465232
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-07
[patent_title] => 'Sense circuit for tracking charge transfer through access transistors in a dynamic random access memory'
[patent_app_type] => 1
[patent_app_number] => 8/275890
[patent_app_country] => US
[patent_app_date] => 1994-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1504
[patent_no_of_claims] => 13
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/465/05465232.pdf
[firstpage_image] =>[orig_patent_app_number] => 275890
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/275890 | Sense circuit for tracking charge transfer through access transistors in a dynamic random access memory | Jul 14, 1994 | Issued |
Array
(
[id] => 3135659
[patent_doc_number] => 05436869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-25
[patent_title] => 'Memory controller which can carry out a high speed access when supplied with input addresses with a time interval left between the input addresses having the same row address'
[patent_app_type] => 1
[patent_app_number] => 8/271640
[patent_app_country] => US
[patent_app_date] => 1994-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4016
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 435
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/436/05436869.pdf
[firstpage_image] =>[orig_patent_app_number] => 271640
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/271640 | Memory controller which can carry out a high speed access when supplied with input addresses with a time interval left between the input addresses having the same row address | Jul 6, 1994 | Issued |
Array
(
[id] => 3525288
[patent_doc_number] => 05487036
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-23
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/268580
[patent_app_country] => US
[patent_app_date] => 1994-07-06
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/487/05487036.pdf
[firstpage_image] =>[orig_patent_app_number] => 268580
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/268580 | Nonvolatile semiconductor memory | Jul 5, 1994 | Issued |
Array
(
[id] => 3428083
[patent_doc_number] => 05434824
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-18
[patent_title] => 'Semiconductor memory device with reduced power consumption and reliable read mode operation'
[patent_app_type] => 1
[patent_app_number] => 8/268573
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[pdf_file] => patents/05/434/05434824.pdf
[firstpage_image] =>[orig_patent_app_number] => 268573
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/268573 | Semiconductor memory device with reduced power consumption and reliable read mode operation | Jul 5, 1994 | Issued |
Array
(
[id] => 3526848
[patent_doc_number] => 05576991
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Multistepped threshold convergence for a flash memory array'
[patent_app_type] => 1
[patent_app_number] => 8/269540
[patent_app_country] => US
[patent_app_date] => 1994-07-01
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[pdf_file] => patents/05/576/05576991.pdf
[firstpage_image] =>[orig_patent_app_number] => 269540
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/269540 | Multistepped threshold convergence for a flash memory array | Jun 30, 1994 | Issued |
Array
(
[id] => 3530367
[patent_doc_number] => 05490109
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Method and apparatus for preventing over-erasure of flash EEPROM memory devices'
[patent_app_type] => 1
[patent_app_number] => 8/267472
[patent_app_country] => US
[patent_app_date] => 1994-06-28
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[pdf_file] => patents/05/490/05490109.pdf
[firstpage_image] =>[orig_patent_app_number] => 267472
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/267472 | Method and apparatus for preventing over-erasure of flash EEPROM memory devices | Jun 27, 1994 | Issued |
Array
(
[id] => 3629707
[patent_doc_number] => 05642321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-24
[patent_title] => 'Voltage level detection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/258640
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/642/05642321.pdf
[firstpage_image] =>[orig_patent_app_number] => 258640
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/258640 | Voltage level detection circuit | Jun 9, 1994 | Issued |
Array
(
[id] => 3424978
[patent_doc_number] => 05453955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-26
[patent_title] => 'Non-volatile semiconductor memory device'
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[patent_app_number] => 8/255904
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/453/05453955.pdf
[firstpage_image] =>[orig_patent_app_number] => 255904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255904 | Non-volatile semiconductor memory device | Jun 6, 1994 | Issued |
Array
(
[id] => 3422220
[patent_doc_number] => 05444665
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/254416
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[pdf_file] => patents/05/444/05444665.pdf
[firstpage_image] =>[orig_patent_app_number] => 254416
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/254416 | Semiconductor memory device | Jun 5, 1994 | Issued |
Array
(
[id] => 3418188
[patent_doc_number] => 05438546
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-01
[patent_title] => 'Programmable redundancy scheme suitable for single-bit state and multibit state nonvolatile memories'
[patent_app_type] => 1
[patent_app_number] => 8/252682
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[pdf_file] => patents/05/438/05438546.pdf
[firstpage_image] =>[orig_patent_app_number] => 252682
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/252682 | Programmable redundancy scheme suitable for single-bit state and multibit state nonvolatile memories | Jun 1, 1994 | Issued |
Array
(
[id] => 3492537
[patent_doc_number] => 05446690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Semiconductor nonvolatile memory device'
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[pdf_file] => patents/05/446/05446690.pdf
[firstpage_image] =>[orig_patent_app_number] => 249383
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/249383 | Semiconductor nonvolatile memory device | May 24, 1994 | Issued |