
Lee D. Wilson
Examiner (ID: 267, Phone: (571)272-4499 , Office: P/3727 )
| Most Active Art Unit | 3723 |
| Art Unit(s) | 3727, 3723, 3203 |
| Total Applications | 4247 |
| Issued Applications | 3456 |
| Pending Applications | 204 |
| Abandoned Applications | 630 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6426077
[patent_doc_number] => 20020184565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Method for coexistence and cooperation between system firmware and debug code'
[patent_app_type] => new
[patent_app_number] => 09/873850
[patent_app_country] => US
[patent_app_date] => 2001-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1922
[patent_no_of_claims] => 18
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[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20020184565.pdf
[firstpage_image] =>[orig_patent_app_number] => 09873850
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/873850 | Method for coexistence and cooperation between system firmware and debug code | Jun 3, 2001 | Issued |
Array
(
[id] => 1088741
[patent_doc_number] => 06832336
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-14
[patent_title] => 'Method and apparatus for maintaining consistent data'
[patent_app_type] => B2
[patent_app_number] => 09/873039
[patent_app_country] => US
[patent_app_date] => 2001-06-02
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[firstpage_image] =>[orig_patent_app_number] => 09873039
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/873039 | Method and apparatus for maintaining consistent data | Jun 1, 2001 | Issued |
Array
(
[id] => 6426124
[patent_doc_number] => 20020184571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'System and method for effecting recovery of a network'
[patent_app_type] => new
[patent_app_number] => 09/871768
[patent_app_country] => US
[patent_app_date] => 2001-06-01
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[patent_drawing_sheets_cnt] => 14
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[pdf_file] => publications/A1/0184/20020184571.pdf
[firstpage_image] =>[orig_patent_app_number] => 09871768
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/871768 | System and method for effecting recovery of a network | May 31, 2001 | Issued |
Array
(
[id] => 1183779
[patent_doc_number] => 06751750
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-15
[patent_title] => 'Method to protect and recover a write ahead log from interruptions'
[patent_app_type] => B1
[patent_app_number] => 09/872643
[patent_app_country] => US
[patent_app_date] => 2001-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/06/751/06751750.pdf
[firstpage_image] =>[orig_patent_app_number] => 09872643
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/872643 | Method to protect and recover a write ahead log from interruptions | May 31, 2001 | Issued |
Array
(
[id] => 6426154
[patent_doc_number] => 20020184574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Power loss memory back-up'
[patent_app_type] => new
[patent_app_number] => 09/872872
[patent_app_country] => US
[patent_app_date] => 2001-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0184/20020184574.pdf
[firstpage_image] =>[orig_patent_app_number] => 09872872
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/872872 | Power loss memory back-up | May 30, 2001 | Issued |
Array
(
[id] => 1040063
[patent_doc_number] => 06874099
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-03-29
[patent_title] => 'Method and software for testing and performance monitoring'
[patent_app_type] => utility
[patent_app_number] => 09/871304
[patent_app_country] => US
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[pdf_file] => patents/06/874/06874099.pdf
[firstpage_image] =>[orig_patent_app_number] => 09871304
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/871304 | Method and software for testing and performance monitoring | May 30, 2001 | Issued |
Array
(
[id] => 6461311
[patent_doc_number] => 20020178403
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[patent_issue_date] => 2002-11-28
[patent_title] => 'Method and apparatus for increasing the effectiveness of system debug and analysis'
[patent_app_type] => new
[patent_app_number] => 09/864114
[patent_app_country] => US
[patent_app_date] => 2001-05-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0178/20020178403.pdf
[firstpage_image] =>[orig_patent_app_number] => 09864114
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/864114 | Method and apparatus for increasing the effectiveness of system debug and analysis | May 23, 2001 | Issued |
Array
(
[id] => 6115634
[patent_doc_number] => 20020174382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Multiple level built-in self-test controller and mehod therefor'
[patent_app_type] => new
[patent_app_number] => 09/859324
[patent_app_country] => US
[patent_app_date] => 2001-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0174/20020174382.pdf
[firstpage_image] =>[orig_patent_app_number] => 09859324
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/859324 | Multiple level built-in self-test controller and method therefor | May 15, 2001 | Issued |
Array
(
[id] => 6226685
[patent_doc_number] => 20020004866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-10
[patent_title] => 'Hardware method to reduce CPU code latency'
[patent_app_type] => new
[patent_app_number] => 09/851594
[patent_app_country] => US
[patent_app_date] => 2001-05-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0004/20020004866.pdf
[firstpage_image] =>[orig_patent_app_number] => 09851594
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/851594 | Hardware method to reduce CPU code latency | May 7, 2001 | Abandoned |
| 09/849915 | Diagnostic system | May 6, 2001 | Abandoned |
| 09/786891 | Device and method for coupling redundant electronic circuits via redundant buses without error propagation | Mar 8, 2001 | Abandoned |
Array
(
[id] => 1088723
[patent_doc_number] => 06832331
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-12-14
[patent_title] => 'Fault tolerant mastership system and method'
[patent_app_type] => B1
[patent_app_number] => 09/788108
[patent_app_country] => US
[patent_app_date] => 2001-02-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/832/06832331.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788108
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788108 | Fault tolerant mastership system and method | Feb 21, 2001 | Issued |
Array
(
[id] => 5926771
[patent_doc_number] => 20020116663
[patent_country] => US
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[patent_issue_date] => 2002-08-22
[patent_title] => 'Data processing system with on-chip FIFO for storing debug information and method therefor'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788815 | Data processing system with on-chip FIFO for storing debug information and method therefor | Feb 20, 2001 | Issued |
Array
(
[id] => 6883331
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[patent_title] => 'Microprocessor internally provided with test circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785466 | Microprocessor internally provided with test circuit | Feb 19, 2001 | Issued |
Array
(
[id] => 5926763
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[patent_title] => 'RAID system having channel capacity unaffected by any single component failure'
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Array
(
[id] => 5861393
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[patent_title] => 'Method for utilizing DRAM memory'
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[firstpage_image] =>[orig_patent_app_number] => 09788834
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788834 | Method for utilizing DRAM memory | Feb 19, 2001 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785572 | Method and apparatus for supporting software | Feb 15, 2001 | Abandoned |
Array
(
[id] => 7001832
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[patent_title] => 'Memory device having redundant cells'
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[firstpage_image] =>[orig_patent_app_number] => 09783554
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/783554 | Memory device having redundant cells | Feb 14, 2001 | Issued |
Array
(
[id] => 774313
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[patent_issue_date] => 2006-02-28
[patent_title] => 'Method and apparatus for recording trace data in a microprocessor based integrated circuit'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/783528 | Disk array device including a memory with backup power supply and method thereof | Feb 14, 2001 | Issued |