Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 3085962
[patent_doc_number] => 05323344
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-21
[patent_title] => 'Quantum memory device'
[patent_app_type] => 1
[patent_app_number] => 8/000880
[patent_app_country] => US
[patent_app_date] => 1993-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 32
[patent_no_of_words] => 4758
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/323/05323344.pdf
[firstpage_image] =>[orig_patent_app_number] => 000880
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/000880 | Quantum memory device | Jan 4, 1993 | Issued |
Array
(
[id] => 3122992
[patent_doc_number] => 05414670
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-09
[patent_title] => 'Low power memory array using selective device activation'
[patent_app_type] => 1
[patent_app_number] => 8/000066
[patent_app_country] => US
[patent_app_date] => 1993-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2780
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/414/05414670.pdf
[firstpage_image] =>[orig_patent_app_number] => 000066
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/000066 | Low power memory array using selective device activation | Jan 3, 1993 | Issued |
Array
(
[id] => 3530344
[patent_doc_number] => 05490107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/996942
[patent_app_country] => US
[patent_app_date] => 1992-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 78
[patent_figures_cnt] => 111
[patent_no_of_words] => 46862
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/490/05490107.pdf
[firstpage_image] =>[orig_patent_app_number] => 996942
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/996942 | Nonvolatile semiconductor memory | Dec 27, 1992 | Issued |
Array
(
[id] => 3018963
[patent_doc_number] => 05355349
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-11
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/992120
[patent_app_country] => US
[patent_app_date] => 1992-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7305
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/355/05355349.pdf
[firstpage_image] =>[orig_patent_app_number] => 992120
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/992120 | Semiconductor integrated circuit device | Dec 16, 1992 | Issued |
Array
(
[id] => 2987228
[patent_doc_number] => 05257221
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-26
[patent_title] => 'Apparatus for selecting mumber of wait states in a burst EPROM architecture'
[patent_app_type] => 1
[patent_app_number] => 7/981949
[patent_app_country] => US
[patent_app_date] => 1992-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2162
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/257/05257221.pdf
[firstpage_image] =>[orig_patent_app_number] => 981949
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/981949 | Apparatus for selecting mumber of wait states in a burst EPROM architecture | Nov 24, 1992 | Issued |
Array
(
[id] => 3004257
[patent_doc_number] => 05367489
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-22
[patent_title] => 'Voltage pumping circuit for semiconductor memory devices'
[patent_app_type] => 1
[patent_app_number] => 7/972780
[patent_app_country] => US
[patent_app_date] => 1992-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 7476
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/367/05367489.pdf
[firstpage_image] =>[orig_patent_app_number] => 972780
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/972780 | Voltage pumping circuit for semiconductor memory devices | Nov 8, 1992 | Issued |
Array
(
[id] => 3111539
[patent_doc_number] => 05315556
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-24
[patent_title] => 'Semiconductor memory having improved sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 7/946420
[patent_app_country] => US
[patent_app_date] => 1992-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5320
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 331
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/315/05315556.pdf
[firstpage_image] =>[orig_patent_app_number] => 946420
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/946420 | Semiconductor memory having improved sense amplifier | Nov 5, 1992 | Issued |
07/970644 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE | Nov 1, 1992 | Abandoned |
Array
(
[id] => 3019147
[patent_doc_number] => 05331589
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-19
[patent_title] => 'Magnetic STM with a non-magnetic tip'
[patent_app_type] => 1
[patent_app_number] => 7/968772
[patent_app_country] => US
[patent_app_date] => 1992-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4470
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/331/05331589.pdf
[firstpage_image] =>[orig_patent_app_number] => 968772
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/968772 | Magnetic STM with a non-magnetic tip | Oct 29, 1992 | Issued |
Array
(
[id] => 3103448
[patent_doc_number] => 05313418
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Semiconductor memory and memorizing method to read only semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/967430
[patent_app_country] => US
[patent_app_date] => 1992-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2324
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313418.pdf
[firstpage_image] =>[orig_patent_app_number] => 967430
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/967430 | Semiconductor memory and memorizing method to read only semiconductor memory | Oct 27, 1992 | Issued |
Array
(
[id] => 3085913
[patent_doc_number] => 05323342
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-21
[patent_title] => 'MOS memory device'
[patent_app_type] => 1
[patent_app_number] => 7/967710
[patent_app_country] => US
[patent_app_date] => 1992-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2853
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/323/05323342.pdf
[firstpage_image] =>[orig_patent_app_number] => 967710
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/967710 | MOS memory device | Oct 27, 1992 | Issued |
Array
(
[id] => 3107886
[patent_doc_number] => 05319589
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-07
[patent_title] => 'Dynamic content addressable memory device and a method of operating thereof'
[patent_app_type] => 1
[patent_app_number] => 7/966921
[patent_app_country] => US
[patent_app_date] => 1992-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 27
[patent_no_of_words] => 9267
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/319/05319589.pdf
[firstpage_image] =>[orig_patent_app_number] => 966921
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/966921 | Dynamic content addressable memory device and a method of operating thereof | Oct 26, 1992 | Issued |
Array
(
[id] => 3029553
[patent_doc_number] => 05303194
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-12
[patent_title] => 'Read only memory'
[patent_app_type] => 1
[patent_app_number] => 7/965421
[patent_app_country] => US
[patent_app_date] => 1992-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3286
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/303/05303194.pdf
[firstpage_image] =>[orig_patent_app_number] => 965421
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/965421 | Read only memory | Oct 22, 1992 | Issued |
Array
(
[id] => 2913206
[patent_doc_number] => 05249154
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-28
[patent_title] => 'Data access controller and method'
[patent_app_type] => 1
[patent_app_number] => 7/966122
[patent_app_country] => US
[patent_app_date] => 1992-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 5786
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/249/05249154.pdf
[firstpage_image] =>[orig_patent_app_number] => 966122
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/966122 | Data access controller and method | Oct 21, 1992 | Issued |
Array
(
[id] => 3029312
[patent_doc_number] => 05303181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-04-12
[patent_title] => 'Programmable chip enable logic function'
[patent_app_type] => 1
[patent_app_number] => 7/963468
[patent_app_country] => US
[patent_app_date] => 1992-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1755
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/303/05303181.pdf
[firstpage_image] =>[orig_patent_app_number] => 963468
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/963468 | Programmable chip enable logic function | Oct 19, 1992 | Issued |
Array
(
[id] => 3117149
[patent_doc_number] => 05418752
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-23
[patent_title] => 'Flash EEPROM system with erase sector select'
[patent_app_type] => 1
[patent_app_number] => 7/963851
[patent_app_country] => US
[patent_app_date] => 1992-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 9491
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/418/05418752.pdf
[firstpage_image] =>[orig_patent_app_number] => 963851
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/963851 | Flash EEPROM system with erase sector select | Oct 19, 1992 | Issued |
07/951125 | ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY WITH NAND CELL STRUCTURE | Sep 24, 1992 | Abandoned |
Array
(
[id] => 2958164
[patent_doc_number] => 05222043
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-22
[patent_title] => 'Circuit configuration for identification of integrated semiconductor circuitries'
[patent_app_type] => 1
[patent_app_number] => 7/945598
[patent_app_country] => US
[patent_app_date] => 1992-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1837
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/222/05222043.pdf
[firstpage_image] =>[orig_patent_app_number] => 945598
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/945598 | Circuit configuration for identification of integrated semiconductor circuitries | Sep 15, 1992 | Issued |
Array
(
[id] => 3061530
[patent_doc_number] => 05325336
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-28
[patent_title] => 'Semiconductor memory device having power line arranged in a meshed shape'
[patent_app_type] => 1
[patent_app_number] => 7/942320
[patent_app_country] => US
[patent_app_date] => 1992-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 18
[patent_no_of_words] => 12753
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/325/05325336.pdf
[firstpage_image] =>[orig_patent_app_number] => 942320
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/942320 | Semiconductor memory device having power line arranged in a meshed shape | Sep 9, 1992 | Issued |
07/940299 | COINCIDENT ACTIVATION OF PASS TRANSISTORS IN A RANDOM ACCESS MEMORY | Sep 2, 1992 | Abandoned |