Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2925019
[patent_doc_number] => 05179540
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Programmable chip enable logic function'
[patent_app_type] => 1
[patent_app_number] => 7/691546
[patent_app_country] => US
[patent_app_date] => 1991-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1755
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/179/05179540.pdf
[firstpage_image] =>[orig_patent_app_number] => 691546
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/691546 | Programmable chip enable logic function | Apr 24, 1991 | Issued |
Array
(
[id] => 2815522
[patent_doc_number] => 05148394
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-15
[patent_title] => 'Electrically programmable nonvolatile semiconductor memory device with NAND cell structure'
[patent_app_type] => 1
[patent_app_number] => 7/685650
[patent_app_country] => US
[patent_app_date] => 1991-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 47
[patent_no_of_words] => 13549
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 21
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/148/05148394.pdf
[firstpage_image] =>[orig_patent_app_number] => 685650
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/685650 | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure | Apr 15, 1991 | Issued |
Array
(
[id] => 2904469
[patent_doc_number] => 05270971
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-14
[patent_title] => 'Semiconductor memory having a plurality of sense amplifier circuits and corresponding bit lines'
[patent_app_type] => 1
[patent_app_number] => 7/677442
[patent_app_country] => US
[patent_app_date] => 1991-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 1918
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/270/05270971.pdf
[firstpage_image] =>[orig_patent_app_number] => 677442
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/677442 | Semiconductor memory having a plurality of sense amplifier circuits and corresponding bit lines | Mar 28, 1991 | Issued |
Array
(
[id] => 3103481
[patent_doc_number] => 05313420
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Programmable semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/676281
[patent_app_country] => US
[patent_app_date] => 1991-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 20
[patent_no_of_words] => 7068
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/313/05313420.pdf
[firstpage_image] =>[orig_patent_app_number] => 676281
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/676281 | Programmable semiconductor memory | Mar 27, 1991 | Issued |
90/002294 | STATIC RAM CELL | Mar 10, 1991 | Issued |
Array
(
[id] => 2820111
[patent_doc_number] => 05086409
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-04
[patent_title] => 'Recording and/or reproducing method of Bloch line memory'
[patent_app_type] => 1
[patent_app_number] => 7/660260
[patent_app_country] => US
[patent_app_date] => 1991-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 30
[patent_no_of_words] => 7071
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/086/05086409.pdf
[firstpage_image] =>[orig_patent_app_number] => 660260
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/660260 | Recording and/or reproducing method of Bloch line memory | Feb 25, 1991 | Issued |
Array
(
[id] => 3525304
[patent_doc_number] => 05487037
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-23
[patent_title] => 'Programmable memory and cell'
[patent_app_type] => 1
[patent_app_number] => 7/657717
[patent_app_country] => US
[patent_app_date] => 1991-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 48
[patent_no_of_words] => 17480
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/487/05487037.pdf
[firstpage_image] =>[orig_patent_app_number] => 657717
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/657717 | Programmable memory and cell | Feb 18, 1991 | Issued |
Array
(
[id] => 2930361
[patent_doc_number] => RE034370
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-07
[patent_title] => 'Bloch-line memory element and RAM memory'
[patent_app_type] => 2
[patent_app_number] => 7/652752
[patent_app_country] => US
[patent_app_date] => 1991-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 2315
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/034/RE034370.pdf
[firstpage_image] =>[orig_patent_app_number] => 652752
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/652752 | Bloch-line memory element and RAM memory | Feb 7, 1991 | Issued |
Array
(
[id] => 2922573
[patent_doc_number] => 05237529
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-17
[patent_title] => 'Microstructure array and activation system therefor'
[patent_app_type] => 1
[patent_app_number] => 7/649522
[patent_app_country] => US
[patent_app_date] => 1991-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 12542
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/237/05237529.pdf
[firstpage_image] =>[orig_patent_app_number] => 649522
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/649522 | Microstructure array and activation system therefor | Jan 31, 1991 | Issued |
Array
(
[id] => 2928273
[patent_doc_number] => 05193076
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-09
[patent_title] => 'Control of sense amplifier latch timing'
[patent_app_type] => 1
[patent_app_number] => 7/647615
[patent_app_country] => US
[patent_app_date] => 1991-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2010
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/193/05193076.pdf
[firstpage_image] =>[orig_patent_app_number] => 647615
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/647615 | Control of sense amplifier latch timing | Jan 27, 1991 | Issued |
Array
(
[id] => 2715760
[patent_doc_number] => 05068826
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-26
[patent_title] => 'Hall effect semiconductor memory cell'
[patent_app_type] => 1
[patent_app_number] => 7/640075
[patent_app_country] => US
[patent_app_date] => 1991-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 7863
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/068/05068826.pdf
[firstpage_image] =>[orig_patent_app_number] => 640075
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/640075 | Hall effect semiconductor memory cell | Jan 10, 1991 | Issued |
Array
(
[id] => 2800871
[patent_doc_number] => 05136546
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/637798
[patent_app_country] => US
[patent_app_date] => 1991-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7664
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/136/05136546.pdf
[firstpage_image] =>[orig_patent_app_number] => 637798
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/637798 | Semiconductor memory | Jan 6, 1991 | Issued |
Array
(
[id] => 2952770
[patent_doc_number] => 05224068
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-29
[patent_title] => 'Recording method for magneto-optic memory medium'
[patent_app_type] => 1
[patent_app_number] => 7/638076
[patent_app_country] => US
[patent_app_date] => 1991-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 4569
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/224/05224068.pdf
[firstpage_image] =>[orig_patent_app_number] => 638076
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/638076 | Recording method for magneto-optic memory medium | Jan 6, 1991 | Issued |
Array
(
[id] => 2942775
[patent_doc_number] => 05233565
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-03
[patent_title] => 'Low power BICMOS memory using address transition detection and a method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/633889
[patent_app_country] => US
[patent_app_date] => 1990-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 7682
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/233/05233565.pdf
[firstpage_image] =>[orig_patent_app_number] => 633889
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/633889 | Low power BICMOS memory using address transition detection and a method therefor | Dec 25, 1990 | Issued |
Array
(
[id] => 2973770
[patent_doc_number] => 05265054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Semiconductor memory with precharged redundancy multiplexing'
[patent_app_type] => 1
[patent_app_number] => 7/627403
[patent_app_country] => US
[patent_app_date] => 1990-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 9703
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/265/05265054.pdf
[firstpage_image] =>[orig_patent_app_number] => 627403
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/627403 | Semiconductor memory with precharged redundancy multiplexing | Dec 13, 1990 | Issued |
Array
(
[id] => 2905035
[patent_doc_number] => 05241495
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/627600
[patent_app_country] => US
[patent_app_date] => 1990-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2710
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241495.pdf
[firstpage_image] =>[orig_patent_app_number] => 627600
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/627600 | Semiconductor memory | Dec 13, 1990 | Issued |
Array
(
[id] => 2830753
[patent_doc_number] => 05173877
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-22
[patent_title] => 'BICMOS combined bit line load and write gate for a memory'
[patent_app_type] => 1
[patent_app_number] => 7/625173
[patent_app_country] => US
[patent_app_date] => 1990-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8321
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/173/05173877.pdf
[firstpage_image] =>[orig_patent_app_number] => 625173
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/625173 | BICMOS combined bit line load and write gate for a memory | Dec 9, 1990 | Issued |
Array
(
[id] => 2966255
[patent_doc_number] => 05243577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-07
[patent_title] => 'Electronic apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/624232
[patent_app_country] => US
[patent_app_date] => 1990-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2850
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/243/05243577.pdf
[firstpage_image] =>[orig_patent_app_number] => 624232
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/624232 | Electronic apparatus | Dec 6, 1990 | Issued |
Array
(
[id] => 2885897
[patent_doc_number] => 05185720
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-09
[patent_title] => 'Memory module for use in a large reconfigurable memory'
[patent_app_type] => 1
[patent_app_number] => 7/623829
[patent_app_country] => US
[patent_app_date] => 1990-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3303
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/185/05185720.pdf
[firstpage_image] =>[orig_patent_app_number] => 623829
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/623829 | Memory module for use in a large reconfigurable memory | Dec 6, 1990 | Issued |
07/621991 | LARGE SCALE INTEGRATED CIRCUIT HAVING LOW INTERNAL OPERATING VOLTAGE | Dec 3, 1990 | Abandoned |