Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2928826
[patent_doc_number] => 05206831
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Serial access semiconductor memory device having a redundancy system'
[patent_app_type] => 1
[patent_app_number] => 7/620080
[patent_app_country] => US
[patent_app_date] => 1990-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 22
[patent_no_of_words] => 9211
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/206/05206831.pdf
[firstpage_image] =>[orig_patent_app_number] => 620080
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/620080 | Serial access semiconductor memory device having a redundancy system | Nov 29, 1990 | Issued |
Array
(
[id] => 2983484
[patent_doc_number] => 05195054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-16
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/618631
[patent_app_country] => US
[patent_app_date] => 1990-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 1383
[patent_no_of_claims] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/195/05195054.pdf
[firstpage_image] =>[orig_patent_app_number] => 618631
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/618631 | Semiconductor memory | Nov 26, 1990 | Issued |
Array
(
[id] => 2945017
[patent_doc_number] => 05229961
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Crosstie random access memory element having associated read/write circuitry'
[patent_app_type] => 1
[patent_app_number] => 7/615832
[patent_app_country] => US
[patent_app_date] => 1990-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 4965
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/229/05229961.pdf
[firstpage_image] =>[orig_patent_app_number] => 615832
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/615832 | Crosstie random access memory element having associated read/write circuitry | Nov 18, 1990 | Issued |
Array
(
[id] => 2944560
[patent_doc_number] => 05197025
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Crosstie random access memory element and a process for the fabrication thereof'
[patent_app_type] => 1
[patent_app_number] => 7/615728
[patent_app_country] => US
[patent_app_date] => 1990-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3687
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/197/05197025.pdf
[firstpage_image] =>[orig_patent_app_number] => 615728
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/615728 | Crosstie random access memory element and a process for the fabrication thereof | Nov 18, 1990 | Issued |
Array
(
[id] => 2796648
[patent_doc_number] => 05165087
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-11-17
[patent_title] => 'Crosstie random access memory element having associated read/write circuitry'
[patent_app_type] => 1
[patent_app_number] => 7/615933
[patent_app_country] => US
[patent_app_date] => 1990-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 4161
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/165/05165087.pdf
[firstpage_image] =>[orig_patent_app_number] => 615933
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/615933 | Crosstie random access memory element having associated read/write circuitry | Nov 18, 1990 | Issued |
Array
(
[id] => 2944233
[patent_doc_number] => 05220528
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Compensation circuit for leakage in flash EPROM'
[patent_app_type] => 1
[patent_app_number] => 7/615400
[patent_app_country] => US
[patent_app_date] => 1990-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2300
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/220/05220528.pdf
[firstpage_image] =>[orig_patent_app_number] => 615400
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/615400 | Compensation circuit for leakage in flash EPROM | Nov 18, 1990 | Issued |
Array
(
[id] => 2942792
[patent_doc_number] => 05233566
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-03
[patent_title] => 'Address detector of a redundancy memory cell'
[patent_app_type] => 1
[patent_app_number] => 7/614140
[patent_app_country] => US
[patent_app_date] => 1990-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3133
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/233/05233566.pdf
[firstpage_image] =>[orig_patent_app_number] => 614140
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/614140 | Address detector of a redundancy memory cell | Nov 15, 1990 | Issued |
Array
(
[id] => 2905225
[patent_doc_number] => 05241506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Semiconductor memory circuit apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/612459
[patent_app_country] => US
[patent_app_date] => 1990-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 6140
[patent_no_of_claims] => 9
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241506.pdf
[firstpage_image] =>[orig_patent_app_number] => 612459
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/612459 | Semiconductor memory circuit apparatus | Nov 13, 1990 | Issued |
Array
(
[id] => 2743433
[patent_doc_number] => 05077687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-31
[patent_title] => 'Gallium arsenide addressable memory cell'
[patent_app_type] => 1
[patent_app_number] => 7/610719
[patent_app_country] => US
[patent_app_date] => 1990-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 1980
[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/077/05077687.pdf
[firstpage_image] =>[orig_patent_app_number] => 610719
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/610719 | Gallium arsenide addressable memory cell | Nov 6, 1990 | Issued |
Array
(
[id] => 2908691
[patent_doc_number] => 05245577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-14
[patent_title] => 'Integrated circuit two-cycle test mode activation circuit'
[patent_app_type] => 1
[patent_app_number] => 7/619763
[patent_app_country] => US
[patent_app_date] => 1990-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2413
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/245/05245577.pdf
[firstpage_image] =>[orig_patent_app_number] => 619763
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/619763 | Integrated circuit two-cycle test mode activation circuit | Nov 5, 1990 | Issued |
Array
(
[id] => 2987449
[patent_doc_number] => 05257233
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-26
[patent_title] => 'Low power memory module using restricted RAM activation'
[patent_app_type] => 1
[patent_app_number] => 7/608125
[patent_app_country] => US
[patent_app_date] => 1990-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2743
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/257/05257233.pdf
[firstpage_image] =>[orig_patent_app_number] => 608125
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/608125 | Low power memory module using restricted RAM activation | Oct 30, 1990 | Issued |
Array
(
[id] => 2902724
[patent_doc_number] => 05210723
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-11
[patent_title] => 'Memory with page mode'
[patent_app_type] => 1
[patent_app_number] => 7/606262
[patent_app_country] => US
[patent_app_date] => 1990-10-31
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/210/05210723.pdf
[firstpage_image] =>[orig_patent_app_number] => 606262
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/606262 | Memory with page mode | Oct 30, 1990 | Issued |
Array
(
[id] => 2969771
[patent_doc_number] => 05198995
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-30
[patent_title] => 'Trench-capacitor-one-transistor storage cell and array for dynamic random access memories'
[patent_app_type] => 1
[patent_app_number] => 7/605892
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/198/05198995.pdf
[firstpage_image] =>[orig_patent_app_number] => 605892
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/605892 | Trench-capacitor-one-transistor storage cell and array for dynamic random access memories | Oct 29, 1990 | Issued |
Array
(
[id] => 2989349
[patent_doc_number] => 05204836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-20
[patent_title] => 'Method and apparatus for implementing redundancy in parallel memory structures'
[patent_app_type] => 1
[patent_app_number] => 7/605510
[patent_app_country] => US
[patent_app_date] => 1990-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6045
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/204/05204836.pdf
[firstpage_image] =>[orig_patent_app_number] => 605510
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/605510 | Method and apparatus for implementing redundancy in parallel memory structures | Oct 29, 1990 | Issued |
Array
(
[id] => 2817121
[patent_doc_number] => 05157632
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-20
[patent_title] => 'High-speed low-power consumption sense amplifier circuit incorporated in semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/604301
[patent_app_country] => US
[patent_app_date] => 1990-10-29
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[pdf_file] => patents/05/157/05157632.pdf
[firstpage_image] =>[orig_patent_app_number] => 604301
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/604301 | High-speed low-power consumption sense amplifier circuit incorporated in semiconductor memory device | Oct 28, 1990 | Issued |
Array
(
[id] => 3019128
[patent_doc_number] => 05331588
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-19
[patent_title] => 'Semiconductor memory device'
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[patent_app_number] => 7/604280
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[pdf_file] => patents/05/331/05331588.pdf
[firstpage_image] =>[orig_patent_app_number] => 604280
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/604280 | Semiconductor memory device | Oct 28, 1990 | Issued |
Array
(
[id] => 2977695
[patent_doc_number] => 05202848
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-13
[patent_title] => 'Read only memory device'
[patent_app_type] => 1
[patent_app_number] => 7/603931
[patent_app_country] => US
[patent_app_date] => 1990-10-26
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/202/05202848.pdf
[firstpage_image] =>[orig_patent_app_number] => 603931
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/603931 | Read only memory device | Oct 25, 1990 | Issued |
Array
(
[id] => 2859360
[patent_doc_number] => 05105383
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-14
[patent_title] => 'Method for detecting the presence of Bloch lines in a magnetic wall'
[patent_app_type] => 1
[patent_app_number] => 7/602372
[patent_app_country] => US
[patent_app_date] => 1990-10-25
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[pdf_file] => patents/05/105/05105383.pdf
[firstpage_image] =>[orig_patent_app_number] => 602372
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/602372 | Method for detecting the presence of Bloch lines in a magnetic wall | Oct 24, 1990 | Issued |
Array
(
[id] => 2928790
[patent_doc_number] => 05206829
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Thin film ferroelectric electro-optic memory'
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[patent_app_number] => 7/603935
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[pdf_file] => patents/05/206/05206829.pdf
[firstpage_image] =>[orig_patent_app_number] => 603935
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/603935 | Thin film ferroelectric electro-optic memory | Oct 23, 1990 | Issued |
Array
(
[id] => 2931693
[patent_doc_number] => 05200922
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-06
[patent_title] => 'Redundancy circuit for high speed EPROM and flash memory devices'
[patent_app_type] => 1
[patent_app_number] => 7/602999
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/200/05200922.pdf
[firstpage_image] =>[orig_patent_app_number] => 602999
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/602999 | Redundancy circuit for high speed EPROM and flash memory devices | Oct 23, 1990 | Issued |