Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2754728
[patent_doc_number] => 05023837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'Bitline segmentation in logic arrays'
[patent_app_type] => 1
[patent_app_number] => 7/402402
[patent_app_country] => US
[patent_app_date] => 1989-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2177
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/023/05023837.pdf
[firstpage_image] =>[orig_patent_app_number] => 402402
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/402402 | Bitline segmentation in logic arrays | Sep 4, 1989 | Issued |
Array
(
[id] => 2722168
[patent_doc_number] => 05010521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-23
[patent_title] => 'CMOS static memory'
[patent_app_type] => 1
[patent_app_number] => 7/401811
[patent_app_country] => US
[patent_app_date] => 1989-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4249
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/010/05010521.pdf
[firstpage_image] =>[orig_patent_app_number] => 401811
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/401811 | CMOS static memory | Aug 31, 1989 | Issued |
07/400210 | SEMICONDUCTOR STATIC MEMORY DEVICE | Aug 28, 1989 | Abandoned |
Array
(
[id] => 2589447
[patent_doc_number] => 04974204
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Non-volatile programmable interconnection circuit'
[patent_app_type] => 1
[patent_app_number] => 7/405431
[patent_app_country] => US
[patent_app_date] => 1989-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 5
[patent_no_of_words] => 2628
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974204.pdf
[firstpage_image] =>[orig_patent_app_number] => 405431
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/405431 | Non-volatile programmable interconnection circuit | Aug 27, 1989 | Issued |
Array
(
[id] => 2668053
[patent_doc_number] => 04979147
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-12-18
[patent_title] => 'Electronic device with key switch'
[patent_app_type] => 1
[patent_app_number] => 7/397331
[patent_app_country] => US
[patent_app_date] => 1989-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3769
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/979/04979147.pdf
[firstpage_image] =>[orig_patent_app_number] => 397331
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/397331 | Electronic device with key switch | Aug 22, 1989 | Issued |
Array
(
[id] => 2626688
[patent_doc_number] => 04969122
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-06
[patent_title] => 'Apparatus for page tagging in a computer system'
[patent_app_type] => 1
[patent_app_number] => 7/400122
[patent_app_country] => US
[patent_app_date] => 1989-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3962
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/969/04969122.pdf
[firstpage_image] =>[orig_patent_app_number] => 400122
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/400122 | Apparatus for page tagging in a computer system | Aug 20, 1989 | Issued |
Array
(
[id] => 2865406
[patent_doc_number] => 05084841
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-28
[patent_title] => 'Programmable status flag generator FIFO using gray code'
[patent_app_type] => 1
[patent_app_number] => 7/393440
[patent_app_country] => US
[patent_app_date] => 1989-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4827
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/084/05084841.pdf
[firstpage_image] =>[orig_patent_app_number] => 393440
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/393440 | Programmable status flag generator FIFO using gray code | Aug 13, 1989 | Issued |
Array
(
[id] => 2759865
[patent_doc_number] => 05022005
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Semiconductor memory device having plural biasing circuits for substrate'
[patent_app_type] => 1
[patent_app_number] => 7/391891
[patent_app_country] => US
[patent_app_date] => 1989-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1650
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/022/05022005.pdf
[firstpage_image] =>[orig_patent_app_number] => 391891
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/391891 | Semiconductor memory device having plural biasing circuits for substrate | Aug 9, 1989 | Issued |
Array
(
[id] => 2636685
[patent_doc_number] => 04967398
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-30
[patent_title] => 'Read/write random access memory with data prefetch'
[patent_app_type] => 1
[patent_app_number] => 7/390952
[patent_app_country] => US
[patent_app_date] => 1989-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 6292
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/967/04967398.pdf
[firstpage_image] =>[orig_patent_app_number] => 390952
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/390952 | Read/write random access memory with data prefetch | Aug 8, 1989 | Issued |
Array
(
[id] => 2785572
[patent_doc_number] => 05151876
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-29
[patent_title] => 'Read-only memory having data register for holding output data'
[patent_app_type] => 1
[patent_app_number] => 7/389142
[patent_app_country] => US
[patent_app_date] => 1989-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2145
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/151/05151876.pdf
[firstpage_image] =>[orig_patent_app_number] => 389142
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/389142 | Read-only memory having data register for holding output data | Aug 2, 1989 | Issued |
07/388783 | READ/WRITE MEMORY HAVING AN ON-CHIP INPUT DATA REGISTER | Aug 1, 1989 | Abandoned |
Array
(
[id] => 2598622
[patent_doc_number] => 04970690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-13
[patent_title] => 'Memory cell arrangement supporting bit-serial arithmetic'
[patent_app_type] => 1
[patent_app_number] => 7/388082
[patent_app_country] => US
[patent_app_date] => 1989-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5961
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/970/04970690.pdf
[firstpage_image] =>[orig_patent_app_number] => 388082
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/388082 | Memory cell arrangement supporting bit-serial arithmetic | Jul 30, 1989 | Issued |
Array
(
[id] => 2680172
[patent_doc_number] => 05034928
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-23
[patent_title] => 'Semiconductor memory device having two-dimensional matrix array'
[patent_app_type] => 1
[patent_app_number] => 7/383212
[patent_app_country] => US
[patent_app_date] => 1989-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 1923
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 267
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/034/05034928.pdf
[firstpage_image] =>[orig_patent_app_number] => 383212
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/383212 | Semiconductor memory device having two-dimensional matrix array | Jul 20, 1989 | Issued |
Array
(
[id] => 2770233
[patent_doc_number] => 05060199
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'Semiconductor device with component circuits under symmetric influence of undesirable turbulence'
[patent_app_type] => 1
[patent_app_number] => 7/382890
[patent_app_country] => US
[patent_app_date] => 1989-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3233
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/060/05060199.pdf
[firstpage_image] =>[orig_patent_app_number] => 382890
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/382890 | Semiconductor device with component circuits under symmetric influence of undesirable turbulence | Jul 20, 1989 | Issued |
Array
(
[id] => 2706065
[patent_doc_number] => 04991142
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-05
[patent_title] => 'Dynamic random access memory with improved sensing and refreshing'
[patent_app_type] => 1
[patent_app_number] => 7/382581
[patent_app_country] => US
[patent_app_date] => 1989-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2020
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/991/04991142.pdf
[firstpage_image] =>[orig_patent_app_number] => 382581
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/382581 | Dynamic random access memory with improved sensing and refreshing | Jul 19, 1989 | Issued |
Array
(
[id] => 2688814
[patent_doc_number] => 05005154
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-04-02
[patent_title] => 'High speed programmable read on memory device formed by bipolar transistors'
[patent_app_type] => 1
[patent_app_number] => 7/381902
[patent_app_country] => US
[patent_app_date] => 1989-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5331
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 416
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/005/05005154.pdf
[firstpage_image] =>[orig_patent_app_number] => 381902
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/381902 | High speed programmable read on memory device formed by bipolar transistors | Jul 18, 1989 | Issued |
Array
(
[id] => 2755101
[patent_doc_number] => 05003510
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-26
[patent_title] => 'Semiconductor memory device with flash write mode of operation'
[patent_app_type] => 1
[patent_app_number] => 7/381901
[patent_app_country] => US
[patent_app_date] => 1989-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4588
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[patent_words_short_claim] => 514
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/003/05003510.pdf
[firstpage_image] =>[orig_patent_app_number] => 381901
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/381901 | Semiconductor memory device with flash write mode of operation | Jul 18, 1989 | Issued |
Array
(
[id] => 2758594
[patent_doc_number] => 05031148
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'MOS semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/382541
[patent_app_country] => US
[patent_app_date] => 1989-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6605
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/031/05031148.pdf
[firstpage_image] =>[orig_patent_app_number] => 382541
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/382541 | MOS semiconductor memory device | Jul 18, 1989 | Issued |
90/001810 | REFRESH GENERATOR SYSTEM | Jul 16, 1989 | Issued |
Array
(
[id] => 2692116
[patent_doc_number] => 05046048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-09-03
[patent_title] => 'Semiconductor integrated circuit including output buffer'
[patent_app_type] => 1
[patent_app_number] => 7/379280
[patent_app_country] => US
[patent_app_date] => 1989-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 8703
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/046/05046048.pdf
[firstpage_image] =>[orig_patent_app_number] => 379280
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/379280 | Semiconductor integrated circuit including output buffer | Jul 12, 1989 | Issued |