Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2754828
[patent_doc_number] => 05023842
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'Semiconductor memory having improved sense amplifiers'
[patent_app_type] => 1
[patent_app_number] => 7/375902
[patent_app_country] => US
[patent_app_date] => 1989-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2675
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/023/05023842.pdf
[firstpage_image] =>[orig_patent_app_number] => 375902
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/375902 | Semiconductor memory having improved sense amplifiers | Jul 5, 1989 | Issued |
Array
(
[id] => 2779218
[patent_doc_number] => 04985869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-15
[patent_title] => 'Semiconductor memory device with an improved substrate back-bias arrangement'
[patent_app_type] => 1
[patent_app_number] => 7/375492
[patent_app_country] => US
[patent_app_date] => 1989-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 12510
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/985/04985869.pdf
[firstpage_image] =>[orig_patent_app_number] => 375492
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/375492 | Semiconductor memory device with an improved substrate back-bias arrangement | Jul 4, 1989 | Issued |
Array
(
[id] => 2682911
[patent_doc_number] => 04984215
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-08
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/374291
[patent_app_country] => US
[patent_app_date] => 1989-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2942
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/984/04984215.pdf
[firstpage_image] =>[orig_patent_app_number] => 374291
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/374291 | Semiconductor memory device | Jun 28, 1989 | Issued |
Array
(
[id] => 2770086
[patent_doc_number] => 05060191
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'Ferroelectric memory'
[patent_app_type] => 1
[patent_app_number] => 7/373082
[patent_app_country] => US
[patent_app_date] => 1989-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 87
[patent_no_of_words] => 15493
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/060/05060191.pdf
[firstpage_image] =>[orig_patent_app_number] => 373082
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/373082 | Ferroelectric memory | Jun 27, 1989 | Issued |
Array
(
[id] => 2716594
[patent_doc_number] => 05001671
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-19
[patent_title] => 'Controller for dual ported memory'
[patent_app_type] => 1
[patent_app_number] => 7/372072
[patent_app_country] => US
[patent_app_date] => 1989-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3617
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/001/05001671.pdf
[firstpage_image] =>[orig_patent_app_number] => 372072
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/372072 | Controller for dual ported memory | Jun 26, 1989 | Issued |
Array
(
[id] => 2682747
[patent_doc_number] => 04984206
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-08
[patent_title] => 'Random access memory with reduced access time in reading operation and operating method thereof'
[patent_app_type] => 1
[patent_app_number] => 7/372441
[patent_app_country] => US
[patent_app_date] => 1989-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 27
[patent_no_of_words] => 14371
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 11
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/984/04984206.pdf
[firstpage_image] =>[orig_patent_app_number] => 372441
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/372441 | Random access memory with reduced access time in reading operation and operating method thereof | Jun 26, 1989 | Issued |
Array
(
[id] => 2779272
[patent_doc_number] => 04985872
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-15
[patent_title] => 'Sequencing column select circuit for a random access memory'
[patent_app_type] => 1
[patent_app_number] => 7/376302
[patent_app_country] => US
[patent_app_date] => 1989-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 5141
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 7
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/985/04985872.pdf
[firstpage_image] =>[orig_patent_app_number] => 376302
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/376302 | Sequencing column select circuit for a random access memory | Jun 22, 1989 | Issued |
Array
(
[id] => 2626742
[patent_doc_number] => 04969125
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-06
[patent_title] => 'Asynchronous segmented precharge architecture'
[patent_app_type] => 1
[patent_app_number] => 7/370941
[patent_app_country] => US
[patent_app_date] => 1989-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 4590
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/969/04969125.pdf
[firstpage_image] =>[orig_patent_app_number] => 370941
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/370941 | Asynchronous segmented precharge architecture | Jun 22, 1989 | Issued |
Array
(
[id] => 2779127
[patent_doc_number] => 04985864
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-15
[patent_title] => 'Static random access memory having column decoded bit line bias'
[patent_app_type] => 1
[patent_app_number] => 7/370542
[patent_app_country] => US
[patent_app_date] => 1989-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4006
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/985/04985864.pdf
[firstpage_image] =>[orig_patent_app_number] => 370542
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/370542 | Static random access memory having column decoded bit line bias | Jun 22, 1989 | Issued |
Array
(
[id] => 2664890
[patent_doc_number] => 04972378
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-20
[patent_title] => 'Nonvolatile memory circuit device performing stable operation in wide range of power source voltage level'
[patent_app_type] => 1
[patent_app_number] => 7/368652
[patent_app_country] => US
[patent_app_date] => 1989-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 5542
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 223
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/972/04972378.pdf
[firstpage_image] =>[orig_patent_app_number] => 368652
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/368652 | Nonvolatile memory circuit device performing stable operation in wide range of power source voltage level | Jun 19, 1989 | Issued |
Array
(
[id] => 2640758
[patent_doc_number] => 04977541
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-12-11
[patent_title] => 'EPROM programming'
[patent_app_type] => 1
[patent_app_number] => 7/363751
[patent_app_country] => US
[patent_app_date] => 1989-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2063
[patent_no_of_claims] => 9
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/977/04977541.pdf
[firstpage_image] =>[orig_patent_app_number] => 363751
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/363751 | EPROM programming | Jun 8, 1989 | Issued |
Array
(
[id] => 2605468
[patent_doc_number] => 04975884
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-12-04
[patent_title] => 'Presettable synchronous predecoded counter'
[patent_app_type] => 1
[patent_app_number] => 7/361652
[patent_app_country] => US
[patent_app_date] => 1989-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/975/04975884.pdf
[firstpage_image] =>[orig_patent_app_number] => 361652
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/361652 | Presettable synchronous predecoded counter | Jun 4, 1989 | Issued |
Array
(
[id] => 2612317
[patent_doc_number] => 04931996
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-05
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/360611
[patent_app_country] => US
[patent_app_date] => 1989-06-02
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/931/04931996.pdf
[firstpage_image] =>[orig_patent_app_number] => 360611
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/360611 | Semiconductor memory device | Jun 1, 1989 | Issued |
Array
(
[id] => 2797894
[patent_doc_number] => 05101377
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-31
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/360490
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[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/101/05101377.pdf
[firstpage_image] =>[orig_patent_app_number] => 360490
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/360490 | Semiconductor memory device | Jun 1, 1989 | Issued |
Array
(
[id] => 2731528
[patent_doc_number] => 05025416
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-18
[patent_title] => 'Thin film magnetic memory elements'
[patent_app_type] => 1
[patent_app_number] => 7/360173
[patent_app_country] => US
[patent_app_date] => 1989-06-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/025/05025416.pdf
[firstpage_image] =>[orig_patent_app_number] => 360173
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/360173 | Thin film magnetic memory elements | May 31, 1989 | Issued |
Array
(
[id] => 2708374
[patent_doc_number] => 04989181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-29
[patent_title] => 'Serial memory device provided with high-speed address control circuit'
[patent_app_type] => 1
[patent_app_number] => 7/358112
[patent_app_country] => US
[patent_app_date] => 1989-05-30
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/989/04989181.pdf
[firstpage_image] =>[orig_patent_app_number] => 358112
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/358112 | Serial memory device provided with high-speed address control circuit | May 29, 1989 | Issued |
Array
(
[id] => 2607165
[patent_doc_number] => 04924439
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-08
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/358262
[patent_app_country] => US
[patent_app_date] => 1989-05-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/924/04924439.pdf
[firstpage_image] =>[orig_patent_app_number] => 358262
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/358262 | Semiconductor integrated circuit | May 29, 1989 | Issued |
Array
(
[id] => 2806707
[patent_doc_number] => 05144578
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-01
[patent_title] => 'Semiconductor device having multiple supply potential paths for reducing electrical interference between circuits contained therein'
[patent_app_type] => 1
[patent_app_number] => 7/358610
[patent_app_country] => US
[patent_app_date] => 1989-05-30
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[pdf_file] => patents/05/144/05144578.pdf
[firstpage_image] =>[orig_patent_app_number] => 358610
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/358610 | Semiconductor device having multiple supply potential paths for reducing electrical interference between circuits contained therein | May 29, 1989 | Issued |
07/356619 | NON-DESTRUCTIVE READ FERROELECTRIC BASED MEMORY CIRCUIT | May 23, 1989 | Issued |
Array
(
[id] => 2877751
[patent_doc_number] => 05097446
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
[patent_title] => 'Nonvolatile semiconductor memory device'
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[patent_app_number] => 7/355480
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[pdf_file] => patents/05/097/05097446.pdf
[firstpage_image] =>[orig_patent_app_number] => 355480
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/355480 | Nonvolatile semiconductor memory device | May 22, 1989 | Issued |