Lee D Wilson

Array ( [id] => 2716616 [patent_doc_number] => 05001672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Video ram with external select of active serial access register' [patent_app_type] => 1 [patent_app_number] => 7/352802 [patent_app_country] => US [patent_app_date] => 1989-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2873 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001672.pdf [firstpage_image] =>[orig_patent_app_number] => 352802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2704019 [patent_doc_number] => 05065368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-12 [patent_title] => 'Video RAM double buffer select control' [patent_app_type] => 1 [patent_app_number] => 7/352442 [patent_app_country] => US [patent_app_date] => 1989-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2929 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/065/05065368.pdf [firstpage_image] =>[orig_patent_app_number] => 352442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2597302 [patent_doc_number] => 04964078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-16 [patent_title] => 'Combined multiple memories' [patent_app_type] => 1 [patent_app_number] => 7/352302 [patent_app_country] => US [patent_app_date] => 1989-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2251 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/964/04964078.pdf [firstpage_image] =>[orig_patent_app_number] => 352302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2773185 [patent_doc_number] => 04995004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'RAM/ROM hybrid memory architecture' [patent_app_type] => 1 [patent_app_number] => 7/352142 [patent_app_country] => US [patent_app_date] => 1989-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 48 [patent_no_of_words] => 17534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/995/04995004.pdf [firstpage_image] =>[orig_patent_app_number] => 352142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2598697 [patent_doc_number] => 04970694 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Chip enable input circuit in semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/351231 [patent_app_country] => US [patent_app_date] => 1989-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 3778 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970694.pdf [firstpage_image] =>[orig_patent_app_number] => 351231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2618635 [patent_doc_number] => 04903235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-20 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/349419 [patent_app_country] => US [patent_app_date] => 1989-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6103 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/903/04903235.pdf [firstpage_image] =>[orig_patent_app_number] => 349419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2770251 [patent_doc_number] => 05060200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Partial random access memory' [patent_app_type] => 1 [patent_app_number] => 7/347320 [patent_app_country] => US [patent_app_date] => 1989-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060200.pdf [firstpage_image] =>[orig_patent_app_number] => 347320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2722222 [patent_doc_number] => 05010524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Crosstalk-shielded-bit-line dram' [patent_app_type] => 1 [patent_app_number] => 7/340962 [patent_app_country] => US [patent_app_date] => 1989-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3326 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010524.pdf [firstpage_image] =>[orig_patent_app_number] => 340962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2578908 [patent_doc_number] => 04901280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-13 [patent_title] => 'Pull-up circuit for high impedance word lines' [patent_app_type] => 1 [patent_app_number] => 7/342584 [patent_app_country] => US [patent_app_date] => 1989-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/901/04901280.pdf [firstpage_image] =>[orig_patent_app_number] => 342584 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2682847 [patent_doc_number] => 05027327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/339661 [patent_app_country] => US [patent_app_date] => 1989-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 2722 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027327.pdf [firstpage_image] =>[orig_patent_app_number] => 339661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678359 [patent_doc_number] => 04954989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-04 [patent_title] => 'MIS type static memory cell and memory and storage process' [patent_app_type] => 1 [patent_app_number] => 7/335732 [patent_app_country] => US [patent_app_date] => 1989-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5413 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/954/04954989.pdf [firstpage_image] =>[orig_patent_app_number] => 335732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2655567 [patent_doc_number] => 04980859 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-25 [patent_title] => 'NOVRAM cell using two differential decouplable nonvolatile memory elements' [patent_app_type] => 1 [patent_app_number] => 7/335112 [patent_app_country] => US [patent_app_date] => 1989-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7240 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/980/04980859.pdf [firstpage_image] =>[orig_patent_app_number] => 335112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2598640 [patent_doc_number] => 04970691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => '2-cell/1-bit type EPROM' [patent_app_type] => 1 [patent_app_number] => 7/334842 [patent_app_country] => US [patent_app_date] => 1989-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6891 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970691.pdf [firstpage_image] =>[orig_patent_app_number] => 334842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2682728 [patent_doc_number] => 04984205 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Semiconductor memory device with improved indicator of state of redundant structure' [patent_app_type] => 1 [patent_app_number] => 7/329612 [patent_app_country] => US [patent_app_date] => 1989-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2729 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/984/04984205.pdf [firstpage_image] =>[orig_patent_app_number] => 329612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2753870 [patent_doc_number] => 04987560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-22 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/328662 [patent_app_country] => US [patent_app_date] => 1989-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4250 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/987/04987560.pdf [firstpage_image] =>[orig_patent_app_number] => 328662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2642022 [patent_doc_number] => 04937792 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-06-26 [patent_title] => 'Static random access memory device with power down function' [patent_app_type] => 1 [patent_app_number] => 7/327272 [patent_app_country] => US [patent_app_date] => 1989-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3939 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/937/04937792.pdf [firstpage_image] =>[orig_patent_app_number] => 327272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2626725 [patent_doc_number] => 04969124 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-06 [patent_title] => 'Method for vertical fuse testing' [patent_app_type] => 1 [patent_app_number] => 7/320762 [patent_app_country] => US [patent_app_date] => 1989-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2905 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/969/04969124.pdf [firstpage_image] =>[orig_patent_app_number] => 320762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2589503 [patent_doc_number] => 04974207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/317252 [patent_app_country] => US [patent_app_date] => 1989-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5211 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974207.pdf [firstpage_image] =>[orig_patent_app_number] => 317252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2643875 [patent_doc_number] => 04953133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-28 [patent_title] => 'Decoder buffer circuit incorporated in semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/313202 [patent_app_country] => US [patent_app_date] => 1989-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3002 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/953/04953133.pdf [firstpage_image] =>[orig_patent_app_number] => 313202 [rel_patent_id] =>[rel_patent_doc_number] =>)