Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2528442
[patent_doc_number] => 04855954
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-08
[patent_title] => 'In-system programmable logic device with four dedicated terminals'
[patent_app_type] => 1
[patent_app_number] => 7/262493
[patent_app_country] => US
[patent_app_date] => 1988-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 59
[patent_no_of_words] => 16456
[patent_no_of_claims] => 4
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[patent_words_short_claim] => 320
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/855/04855954.pdf
[firstpage_image] =>[orig_patent_app_number] => 262493
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/262493 | In-system programmable logic device with four dedicated terminals | Oct 24, 1988 | Issued |
Array
(
[id] => 2636417
[patent_doc_number] => 04951252
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-21
[patent_title] => 'Digital memory system'
[patent_app_type] => 1
[patent_app_number] => 7/262402
[patent_app_country] => US
[patent_app_date] => 1988-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2345
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[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/951/04951252.pdf
[firstpage_image] =>[orig_patent_app_number] => 262402
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/262402 | Digital memory system | Oct 24, 1988 | Issued |
Array
(
[id] => 2639472
[patent_doc_number] => 04916666
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-10
[patent_title] => 'Dynamic random access memory device and operating method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/261021
[patent_app_country] => US
[patent_app_date] => 1988-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 3674
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/916/04916666.pdf
[firstpage_image] =>[orig_patent_app_number] => 261021
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/261021 | Dynamic random access memory device and operating method therefor | Oct 19, 1988 | Issued |
Array
(
[id] => 2944760
[patent_doc_number] => 05197035
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/259731
[patent_app_country] => US
[patent_app_date] => 1988-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 7879
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/197/05197035.pdf
[firstpage_image] =>[orig_patent_app_number] => 259731
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/259731 | Semiconductor memory | Oct 18, 1988 | Issued |
Array
(
[id] => 2759791
[patent_doc_number] => 05022001
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Method for the programming of the memory cells of a memory and a circuit to implement this method'
[patent_app_type] => 1
[patent_app_number] => 7/258801
[patent_app_country] => US
[patent_app_date] => 1988-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3927
[patent_no_of_claims] => 8
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/022/05022001.pdf
[firstpage_image] =>[orig_patent_app_number] => 258801
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/258801 | Method for the programming of the memory cells of a memory and a circuit to implement this method | Oct 16, 1988 | Issued |
Array
(
[id] => 2572306
[patent_doc_number] => 04945513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Gate array device'
[patent_app_type] => 1
[patent_app_number] => 7/258592
[patent_app_country] => US
[patent_app_date] => 1988-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 2640
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945513.pdf
[firstpage_image] =>[orig_patent_app_number] => 258592
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/258592 | Gate array device | Oct 16, 1988 | Issued |
Array
(
[id] => 2612415
[patent_doc_number] => 04932001
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-05
[patent_title] => 'Reducing power consumption in on-chip memory devices'
[patent_app_type] => 1
[patent_app_number] => 7/256682
[patent_app_country] => US
[patent_app_date] => 1988-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3305
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/932/04932001.pdf
[firstpage_image] =>[orig_patent_app_number] => 256682
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/256682 | Reducing power consumption in on-chip memory devices | Oct 11, 1988 | Issued |
Array
(
[id] => 2643442
[patent_doc_number] => 04893277
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-09
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/255314
[patent_app_country] => US
[patent_app_date] => 1988-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 8735
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/893/04893277.pdf
[firstpage_image] =>[orig_patent_app_number] => 255314
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/255314 | Semiconductor memory | Oct 10, 1988 | Issued |
Array
(
[id] => 2613051
[patent_doc_number] => 04949305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-14
[patent_title] => 'Erasable read-only semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/254232
[patent_app_country] => US
[patent_app_date] => 1988-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/949/04949305.pdf
[firstpage_image] =>[orig_patent_app_number] => 254232
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/254232 | Erasable read-only semiconductor memory device | Oct 5, 1988 | Issued |
Array
(
[id] => 2664576
[patent_doc_number] => 04962480
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-09
[patent_title] => 'Memory reading apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/243514
[patent_app_country] => US
[patent_app_date] => 1988-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5476
[patent_no_of_claims] => 13
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/962/04962480.pdf
[firstpage_image] =>[orig_patent_app_number] => 243514
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/243514 | Memory reading apparatus | Sep 11, 1988 | Issued |
Array
(
[id] => 2572342
[patent_doc_number] => 04945515
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-31
[patent_title] => 'Memory writing apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/243512
[patent_app_country] => US
[patent_app_date] => 1988-09-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/945/04945515.pdf
[firstpage_image] =>[orig_patent_app_number] => 243512
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/243512 | Memory writing apparatus | Sep 11, 1988 | Issued |
Array
(
[id] => 2530012
[patent_doc_number] => 04885721
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-05
[patent_title] => 'Semiconductor memory device with redundant memory cells'
[patent_app_type] => 1
[patent_app_number] => 7/242452
[patent_app_country] => US
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[pdf_file] => patents/04/885/04885721.pdf
[firstpage_image] =>[orig_patent_app_number] => 242452
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/242452 | Semiconductor memory device with redundant memory cells | Sep 8, 1988 | Issued |
Array
(
[id] => 2643839
[patent_doc_number] => 04953131
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-28
[patent_title] => 'Unconditional clock and automatic refresh logic'
[patent_app_type] => 1
[patent_app_number] => 7/241421
[patent_app_country] => US
[patent_app_date] => 1988-09-07
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[pdf_file] => patents/04/953/04953131.pdf
[firstpage_image] =>[orig_patent_app_number] => 241421
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/241421 | Unconditional clock and automatic refresh logic | Sep 6, 1988 | Issued |
Array
(
[id] => 2677925
[patent_doc_number] => 04905198
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-27
[patent_title] => 'Semiconductor integrated circuit device'
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[patent_app_number] => 7/240603
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[pdf_file] => patents/04/905/04905198.pdf
[firstpage_image] =>[orig_patent_app_number] => 240603
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/240603 | Semiconductor integrated circuit device | Sep 5, 1988 | Issued |
Array
(
[id] => 2621093
[patent_doc_number] => 04943786
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-24
[patent_title] => 'Digital control of phase locked loops'
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[patent_app_number] => 7/240425
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[pdf_file] => patents/04/943/04943786.pdf
[firstpage_image] =>[orig_patent_app_number] => 240425
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/240425 | Digital control of phase locked loops | Aug 31, 1988 | Issued |
Array
(
[id] => 2676911
[patent_doc_number] => 04935902
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[patent_kind] => NA
[patent_issue_date] => 1990-06-19
[patent_title] => 'Sequential access memory'
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[pdf_file] => patents/04/935/04935902.pdf
[firstpage_image] =>[orig_patent_app_number] => 238241
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/238241 | Sequential access memory | Aug 29, 1988 | Issued |
Array
(
[id] => 2689309
[patent_doc_number] => 05067109
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[patent_kind] => NA
[patent_issue_date] => 1991-11-19
[patent_title] => 'Data output buffer circuit for a SRAM'
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[patent_app_number] => 7/238247
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[pdf_file] => patents/05/067/05067109.pdf
[firstpage_image] =>[orig_patent_app_number] => 238247
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/238247 | Data output buffer circuit for a SRAM | Aug 29, 1988 | Issued |
Array
(
[id] => 2602240
[patent_doc_number] => 04941129
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[patent_kind] => NA
[patent_issue_date] => 1990-07-10
[patent_title] => 'Semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/237051 | Semiconductor memory device | Aug 28, 1988 | Issued |
Array
(
[id] => 2665487
[patent_doc_number] => 04930106
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[patent_title] => 'Dual cache RAM for rapid invalidation'
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[firstpage_image] =>[orig_patent_app_number] => 237817
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/237817 | Dual cache RAM for rapid invalidation | Aug 28, 1988 | Issued |
Array
(
[id] => 2608303
[patent_doc_number] => 04922459
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[patent_title] => 'Dynamic semiconductor memory device'
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[pdf_file] => patents/04/922/04922459.pdf
[firstpage_image] =>[orig_patent_app_number] => 236361
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/236361 | Dynamic semiconductor memory device | Aug 24, 1988 | Issued |