Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2487219
[patent_doc_number] => 04882709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-21
[patent_title] => 'Conditional write RAM'
[patent_app_type] => 1
[patent_app_number] => 7/236552
[patent_app_country] => US
[patent_app_date] => 1988-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 4548
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 683
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/882/04882709.pdf
[firstpage_image] =>[orig_patent_app_number] => 236552
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/236552 | Conditional write RAM | Aug 24, 1988 | Issued |
Array
(
[id] => 2565181
[patent_doc_number] => 04961172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-02
[patent_title] => 'Decoder for a memory address bus'
[patent_app_type] => 1
[patent_app_number] => 7/231122
[patent_app_country] => US
[patent_app_date] => 1988-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 23
[patent_no_of_words] => 5342
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/961/04961172.pdf
[firstpage_image] =>[orig_patent_app_number] => 231122
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/231122 | Decoder for a memory address bus | Aug 10, 1988 | Issued |
Array
(
[id] => 2665507
[patent_doc_number] => 04930107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-29
[patent_title] => 'Method and apparatus for programming and verifying programmable elements in programmable devices'
[patent_app_type] => 1
[patent_app_number] => 7/229852
[patent_app_country] => US
[patent_app_date] => 1988-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 3543
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/930/04930107.pdf
[firstpage_image] =>[orig_patent_app_number] => 229852
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/229852 | Method and apparatus for programming and verifying programmable elements in programmable devices | Aug 7, 1988 | Issued |
Array
(
[id] => 2706012
[patent_doc_number] => 04991139
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-05
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/228022
[patent_app_country] => US
[patent_app_date] => 1988-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 21553
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/991/04991139.pdf
[firstpage_image] =>[orig_patent_app_number] => 228022
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/228022 | Semiconductor memory device | Aug 3, 1988 | Issued |
Array
(
[id] => 2676834
[patent_doc_number] => 04935898
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-19
[patent_title] => 'Semiconductor memory unit'
[patent_app_type] => 1
[patent_app_number] => 7/228021
[patent_app_country] => US
[patent_app_date] => 1988-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 7939
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/935/04935898.pdf
[firstpage_image] =>[orig_patent_app_number] => 228021
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/228021 | Semiconductor memory unit | Aug 3, 1988 | Issued |
Array
(
[id] => 2652440
[patent_doc_number] => 04939696
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-03
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/225312
[patent_app_country] => US
[patent_app_date] => 1988-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 8295
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/939/04939696.pdf
[firstpage_image] =>[orig_patent_app_number] => 225312
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/225312 | Semiconductor memory device | Jul 27, 1988 | Issued |
Array
(
[id] => 2676875
[patent_doc_number] => 04935900
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-19
[patent_title] => 'Dynamic random access memory with a self-refreshing function'
[patent_app_type] => 1
[patent_app_number] => 7/225291
[patent_app_country] => US
[patent_app_date] => 1988-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3658
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/935/04935900.pdf
[firstpage_image] =>[orig_patent_app_number] => 225291
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/225291 | Dynamic random access memory with a self-refreshing function | Jul 26, 1988 | Issued |
Array
(
[id] => 2636399
[patent_doc_number] => 04951251
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-21
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/224375
[patent_app_country] => US
[patent_app_date] => 1988-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 10005
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/951/04951251.pdf
[firstpage_image] =>[orig_patent_app_number] => 224375
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/224375 | Semiconductor memory device | Jul 25, 1988 | Issued |
Array
(
[id] => 2607241
[patent_doc_number] => 04924443
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-08
[patent_title] => 'Semiconductor memory comprising a recognition circuit for signal changes'
[patent_app_type] => 1
[patent_app_number] => 7/219271
[patent_app_country] => US
[patent_app_date] => 1988-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 6283
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/924/04924443.pdf
[firstpage_image] =>[orig_patent_app_number] => 219271
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/219271 | Semiconductor memory comprising a recognition circuit for signal changes | Jul 14, 1988 | Issued |
07/216652 | SEMICONDUCTOR MEMORY DEVICE | Jul 6, 1988 | Abandoned |
Array
(
[id] => 2604227
[patent_doc_number] => 04933910
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-12
[patent_title] => 'Method for improving the page hit ratio of a page mode main memory system'
[patent_app_type] => 1
[patent_app_number] => 7/215652
[patent_app_country] => US
[patent_app_date] => 1988-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2822
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/933/04933910.pdf
[firstpage_image] =>[orig_patent_app_number] => 215652
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/215652 | Method for improving the page hit ratio of a page mode main memory system | Jul 5, 1988 | Issued |
Array
(
[id] => 2644692
[patent_doc_number] => 04899312
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-06
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/214542
[patent_app_country] => US
[patent_app_date] => 1988-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 12703
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/899/04899312.pdf
[firstpage_image] =>[orig_patent_app_number] => 214542
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/214542 | Semiconductor memory | Jun 30, 1988 | Issued |
Array
(
[id] => 2628669
[patent_doc_number] => 04894804
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-16
[patent_title] => 'Resetting arrangement for a semiconductor integrated circuit device having semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/212575
[patent_app_country] => US
[patent_app_date] => 1988-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/894/04894804.pdf
[firstpage_image] =>[orig_patent_app_number] => 212575
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/212575 | Resetting arrangement for a semiconductor integrated circuit device having semiconductor memory | Jun 27, 1988 | Issued |
Array
(
[id] => 2527806
[patent_doc_number] => 04870622
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-26
[patent_title] => 'DRAM controller cache'
[patent_app_type] => 1
[patent_app_number] => 7/211511
[patent_app_country] => US
[patent_app_date] => 1988-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 8972
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/870/04870622.pdf
[firstpage_image] =>[orig_patent_app_number] => 211511
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/211511 | DRAM controller cache | Jun 23, 1988 | Issued |
07/207915 | PULL-UP CIRCUIT FOR HIGH IMPEDANCE WORD LINES | Jun 12, 1988 | Abandoned |
Array
(
[id] => 2612803
[patent_doc_number] => 04912677
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-27
[patent_title] => 'Programmable logic device'
[patent_app_type] => 1
[patent_app_number] => 7/204842
[patent_app_country] => US
[patent_app_date] => 1988-06-10
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 5944
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/912/04912677.pdf
[firstpage_image] =>[orig_patent_app_number] => 204842
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/204842 | Programmable logic device | Jun 9, 1988 | Issued |
Array
(
[id] => 2574618
[patent_doc_number] => 04858197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-15
[patent_title] => 'Output buffer control circuit of memory device'
[patent_app_type] => 1
[patent_app_number] => 7/198052
[patent_app_country] => US
[patent_app_date] => 1988-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/858/04858197.pdf
[firstpage_image] =>[orig_patent_app_number] => 198052
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/198052 | Output buffer control circuit of memory device | May 23, 1988 | Issued |
Array
(
[id] => 2639525
[patent_doc_number] => 04916669
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-10
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 7/196262
[patent_app_country] => US
[patent_app_date] => 1988-05-20
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/916/04916669.pdf
[firstpage_image] =>[orig_patent_app_number] => 196262
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/196262 | Semiconductor memory | May 19, 1988 | Issued |
Array
(
[id] => 2628579
[patent_doc_number] => 04894799
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-16
[patent_title] => 'Content-addressable memory'
[patent_app_type] => 1
[patent_app_number] => 7/193942
[patent_app_country] => US
[patent_app_date] => 1988-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/894/04894799.pdf
[firstpage_image] =>[orig_patent_app_number] => 193942
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/193942 | Content-addressable memory | May 11, 1988 | Issued |
Array
(
[id] => 2484017
[patent_doc_number] => 04890260
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-26
[patent_title] => 'Content addressable memory array with maskable and resettable bits'
[patent_app_type] => 1
[patent_app_number] => 7/193312
[patent_app_country] => US
[patent_app_date] => 1988-05-11
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/890/04890260.pdf
[firstpage_image] =>[orig_patent_app_number] => 193312
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/193312 | Content addressable memory array with maskable and resettable bits | May 10, 1988 | Issued |