Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2646697
[patent_doc_number] => 04910712
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-20
[patent_title] => 'Memory cell with a plurality of pass gates'
[patent_app_type] => 1
[patent_app_number] => 7/157632
[patent_app_country] => US
[patent_app_date] => 1988-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3956
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[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/910/04910712.pdf
[firstpage_image] =>[orig_patent_app_number] => 157632
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/157632 | Memory cell with a plurality of pass gates | Feb 17, 1988 | Issued |
Array
(
[id] => 2563962
[patent_doc_number] => 04897820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-30
[patent_title] => 'Bi-CMOS type of semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/156432
[patent_app_country] => US
[patent_app_date] => 1988-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4300
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/897/04897820.pdf
[firstpage_image] =>[orig_patent_app_number] => 156432
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/156432 | Bi-CMOS type of semiconductor memory device | Feb 15, 1988 | Issued |
Array
(
[id] => 2618654
[patent_doc_number] => 04903236
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Nonvolatile semiconductor memory device and a writing method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/156431
[patent_app_country] => US
[patent_app_date] => 1988-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6533
[patent_no_of_claims] => 18
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[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/903/04903236.pdf
[firstpage_image] =>[orig_patent_app_number] => 156431
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/156431 | Nonvolatile semiconductor memory device and a writing method therefor | Feb 15, 1988 | Issued |
Array
(
[id] => 2568173
[patent_doc_number] => 04853898
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-01
[patent_title] => 'Bipolar ram having state dependent write current'
[patent_app_type] => 1
[patent_app_number] => 7/155021
[patent_app_country] => US
[patent_app_date] => 1988-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4664
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/853/04853898.pdf
[firstpage_image] =>[orig_patent_app_number] => 155021
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/155021 | Bipolar ram having state dependent write current | Feb 10, 1988 | Issued |
Array
(
[id] => 2528230
[patent_doc_number] => 04864540
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-05
[patent_title] => 'Bipolar ram having no write recovery time'
[patent_app_type] => 1
[patent_app_number] => 7/155022
[patent_app_country] => US
[patent_app_date] => 1988-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 7641
[patent_no_of_claims] => 7
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/864/04864540.pdf
[firstpage_image] =>[orig_patent_app_number] => 155022
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/155022 | Bipolar ram having no write recovery time | Feb 10, 1988 | Issued |
Array
(
[id] => 3044259
[patent_doc_number] => 05329479
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-12
[patent_title] => 'Dynamic semiconductor memories'
[patent_app_type] => 1
[patent_app_number] => 7/154442
[patent_app_country] => US
[patent_app_date] => 1988-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2932
[patent_no_of_claims] => 2
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[patent_words_short_claim] => 155
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/329/05329479.pdf
[firstpage_image] =>[orig_patent_app_number] => 154442
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/154442 | Dynamic semiconductor memories | Feb 7, 1988 | Issued |
Array
(
[id] => 2574430
[patent_doc_number] => 04858187
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-15
[patent_title] => 'Programming implementation circuit'
[patent_app_type] => 1
[patent_app_number] => 7/150861
[patent_app_country] => US
[patent_app_date] => 1988-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1599
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/858/04858187.pdf
[firstpage_image] =>[orig_patent_app_number] => 150861
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/150861 | Programming implementation circuit | Jan 31, 1988 | Issued |
Array
(
[id] => 2531482
[patent_doc_number] => 04878199
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-31
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/150052
[patent_app_country] => US
[patent_app_date] => 1988-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3140
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/878/04878199.pdf
[firstpage_image] =>[orig_patent_app_number] => 150052
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/150052 | Semiconductor memory device | Jan 28, 1988 | Issued |
Array
(
[id] => 2525043
[patent_doc_number] => 04875189
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-17
[patent_title] => 'Random access memory device with nibble mode operation'
[patent_app_type] => 1
[patent_app_number] => 7/149282
[patent_app_country] => US
[patent_app_date] => 1988-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 6038
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/875/04875189.pdf
[firstpage_image] =>[orig_patent_app_number] => 149282
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/149282 | Random access memory device with nibble mode operation | Jan 27, 1988 | Issued |
Array
(
[id] => 2534972
[patent_doc_number] => 04888737
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-19
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/148432
[patent_app_country] => US
[patent_app_date] => 1988-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 7036
[patent_no_of_claims] => 19
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/888/04888737.pdf
[firstpage_image] =>[orig_patent_app_number] => 148432
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/148432 | Semiconductor memory device | Jan 25, 1988 | Issued |
Array
(
[id] => 2501027
[patent_doc_number] => 04860263
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-22
[patent_title] => 'Semiconductor memory with random access via two separate inputs/outputs'
[patent_app_type] => 1
[patent_app_number] => 7/147451
[patent_app_country] => US
[patent_app_date] => 1988-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3444
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/860/04860263.pdf
[firstpage_image] =>[orig_patent_app_number] => 147451
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/147451 | Semiconductor memory with random access via two separate inputs/outputs | Jan 24, 1988 | Issued |
Array
(
[id] => 2655283
[patent_doc_number] => 04896298
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-23
[patent_title] => 'Read circuit for memory'
[patent_app_type] => 1
[patent_app_number] => 7/147902
[patent_app_country] => US
[patent_app_date] => 1988-01-25
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[pdf_file] => patents/04/896/04896298.pdf
[firstpage_image] =>[orig_patent_app_number] => 147902
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/147902 | Read circuit for memory | Jan 24, 1988 | Issued |
Array
(
[id] => 2487199
[patent_doc_number] => 04882708
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-21
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 7/145411
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[pdf_file] => patents/04/882/04882708.pdf
[firstpage_image] =>[orig_patent_app_number] => 145411
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/145411 | Semiconductor memory device | Jan 18, 1988 | Issued |
Array
(
[id] => 2561874
[patent_doc_number] => 04833654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-05-23
[patent_title] => 'Method of and circuitry for generating staggered restore timing signals in block partitioned DRAM'
[patent_app_type] => 1
[patent_app_number] => 7/144382
[patent_app_country] => US
[patent_app_date] => 1988-01-15
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/833/04833654.pdf
[firstpage_image] =>[orig_patent_app_number] => 144382
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/144382 | Method of and circuitry for generating staggered restore timing signals in block partitioned DRAM | Jan 14, 1988 | Issued |
Array
(
[id] => 2534953
[patent_doc_number] => 04888736
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-19
[patent_title] => 'Semiconductor memory device using stored capacitor charge for writing data'
[patent_app_type] => 1
[patent_app_number] => 7/142972
[patent_app_country] => US
[patent_app_date] => 1988-01-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/888/04888736.pdf
[firstpage_image] =>[orig_patent_app_number] => 142972
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/142972 | Semiconductor memory device using stored capacitor charge for writing data | Jan 11, 1988 | Issued |
07/142032 | HIGH SPEED BIPOLAR MEMORY CELL | Jan 10, 1988 | Abandoned |
Array
(
[id] => 2525118
[patent_doc_number] => 04875193
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-17
[patent_title] => 'Semiconductor memory with improved cell arrangement'
[patent_app_type] => 1
[patent_app_number] => 7/138482
[patent_app_country] => US
[patent_app_date] => 1987-12-28
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/875/04875193.pdf
[firstpage_image] =>[orig_patent_app_number] => 138482
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/138482 | Semiconductor memory with improved cell arrangement | Dec 27, 1987 | Issued |
Array
(
[id] => 2964095
[patent_doc_number] => 05231603
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-27
[patent_title] => 'Variable page ROM'
[patent_app_type] => 1
[patent_app_number] => 7/134964
[patent_app_country] => US
[patent_app_date] => 1987-12-18
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/231/05231603.pdf
[firstpage_image] =>[orig_patent_app_number] => 134964
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/134964 | Variable page ROM | Dec 17, 1987 | Issued |
Array
(
[id] => 2565222
[patent_doc_number] => 04809233
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-02-28
[patent_title] => 'Pseudo-static memory device having internal self-refresh circuit'
[patent_app_type] => 1
[patent_app_number] => 7/135102
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[patent_app_date] => 1987-12-18
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[pdf_file] => patents/04/809/04809233.pdf
[firstpage_image] =>[orig_patent_app_number] => 135102
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/135102 | Pseudo-static memory device having internal self-refresh circuit | Dec 17, 1987 | Issued |
Array
(
[id] => 2664799
[patent_doc_number] => 04972373
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-20
[patent_title] => 'Precharge system in a SRAM'
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[patent_app_number] => 7/134511
[patent_app_country] => US
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[pdf_file] => patents/04/972/04972373.pdf
[firstpage_image] =>[orig_patent_app_number] => 134511
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/134511 | Precharge system in a SRAM | Dec 16, 1987 | Issued |