Lee D Wilson

Array ( [id] => 2461080 [patent_doc_number] => 04760559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/883311 [patent_app_country] => US [patent_app_date] => 1986-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3321 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/760/04760559.pdf [firstpage_image] =>[orig_patent_app_number] => 883311 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2481931 [patent_doc_number] => 04887239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-12 [patent_title] => 'One-time programmable data security system for programmable logic device' [patent_app_type] => 1 [patent_app_number] => 6/882602 [patent_app_country] => US [patent_app_date] => 1986-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6265 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/887/04887239.pdf [firstpage_image] =>[orig_patent_app_number] => 882602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2451412 [patent_doc_number] => 04779229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-18 [patent_title] => 'Prom with programmable output structures' [patent_app_type] => 1 [patent_app_number] => 6/881161 [patent_app_country] => US [patent_app_date] => 1986-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2455 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/779/04779229.pdf [firstpage_image] =>[orig_patent_app_number] => 881161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2456116 [patent_doc_number] => 04791616 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-13 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/879782 [patent_app_country] => US [patent_app_date] => 1986-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 8876 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/791/04791616.pdf [firstpage_image] =>[orig_patent_app_number] => 879782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2431052 [patent_doc_number] => 04780854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-25 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 6/878691 [patent_app_country] => US [patent_app_date] => 1986-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 3304 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/780/04780854.pdf [firstpage_image] =>[orig_patent_app_number] => 878691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2533893 [patent_doc_number] => RE032937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-30 [patent_title] => 'Modulation system for optical recording' [patent_app_type] => 2 [patent_app_number] => 6/878866 [patent_app_country] => US [patent_app_date] => 1986-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2565 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/032/RE032937.pdf [firstpage_image] =>[orig_patent_app_number] => 878866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2431014 [patent_doc_number] => 04780852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-25 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/878072 [patent_app_country] => US [patent_app_date] => 1986-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8735 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/780/04780852.pdf [firstpage_image] =>[orig_patent_app_number] => 878072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2452398 [patent_doc_number] => 04757476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-12 [patent_title] => 'Dummy word line driving circuit for a MOS dynamic RAM' [patent_app_type] => 1 [patent_app_number] => 6/876912 [patent_app_country] => US [patent_app_date] => 1986-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1648 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/757/04757476.pdf [firstpage_image] =>[orig_patent_app_number] => 876912 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2461787 [patent_doc_number] => 04766570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/874106 [patent_app_country] => US [patent_app_date] => 1986-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 10009 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/766/04766570.pdf [firstpage_image] =>[orig_patent_app_number] => 874106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2390168 [patent_doc_number] => 04783767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-11-08 [patent_title] => 'Static RAM with divided word-line structure' [patent_app_type] => 1 [patent_app_number] => 6/872126 [patent_app_country] => US [patent_app_date] => 1986-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2875 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/783/04783767.pdf [firstpage_image] =>[orig_patent_app_number] => 872126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2453179 [patent_doc_number] => 04745580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-17 [patent_title] => 'Variable clamped memory cell' [patent_app_type] => 1 [patent_app_number] => 6/872292 [patent_app_country] => US [patent_app_date] => 1986-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2442 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/745/04745580.pdf [firstpage_image] =>[orig_patent_app_number] => 872292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2461769 [patent_doc_number] => 04766569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-23 [patent_title] => 'Programmable logic array' [patent_app_type] => 1 [patent_app_number] => 6/871063 [patent_app_country] => US [patent_app_date] => 1986-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7764 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/766/04766569.pdf [firstpage_image] =>[orig_patent_app_number] => 871063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2497958 [patent_doc_number] => 04802121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-01-31 [patent_title] => 'Memory array with partitioned bit lines' [patent_app_type] => 1 [patent_app_number] => 6/869471 [patent_app_country] => US [patent_app_date] => 1986-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1347 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/802/04802121.pdf [firstpage_image] =>[orig_patent_app_number] => 869471 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2452336 [patent_doc_number] => 04757473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-12 [patent_title] => 'Memory circuit' [patent_app_type] => 1 [patent_app_number] => 6/865376 [patent_app_country] => US [patent_app_date] => 1986-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3509 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/757/04757473.pdf [firstpage_image] =>[orig_patent_app_number] => 865376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2452380 [patent_doc_number] => 04757475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-12 [patent_title] => 'Semiconductor memory device having diode matrix type decoder and redundancy configuration' [patent_app_type] => 1 [patent_app_number] => 6/863041 [patent_app_country] => US [patent_app_date] => 1986-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8470 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/757/04757475.pdf [firstpage_image] =>[orig_patent_app_number] => 863041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2482781 [patent_doc_number] => 04879688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-11-07 [patent_title] => 'In-system programmable logic device' [patent_app_type] => 1 [patent_app_number] => 6/862815 [patent_app_country] => US [patent_app_date] => 1986-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 59 [patent_no_of_words] => 15365 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/879/04879688.pdf [firstpage_image] =>[orig_patent_app_number] => 862815 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2458412 [patent_doc_number] => 04758990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-19 [patent_title] => 'Resetting arrangement for a semiconductor integrated circuit device having semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/860411 [patent_app_country] => US [patent_app_date] => 1986-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5475 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/758/04758990.pdf [firstpage_image] =>[orig_patent_app_number] => 860411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2420864 [patent_doc_number] => 04731760 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-03-15 [patent_title] => 'On-chip test circuitry for an ECL PROM' [patent_app_type] => 1 [patent_app_number] => 6/859581 [patent_app_country] => US [patent_app_date] => 1986-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3188 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/731/04731760.pdf [firstpage_image] =>[orig_patent_app_number] => 859581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2355696 [patent_doc_number] => 04704707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-03 [patent_title] => 'Electrostatic random access memory' [patent_app_type] => 1 [patent_app_number] => 6/854822 [patent_app_country] => US [patent_app_date] => 1986-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2930 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/704/04704707.pdf [firstpage_image] =>[orig_patent_app_number] => 854822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2558231 [patent_doc_number] => 04811293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-03-07 [patent_title] => 'Method for storing data in an electrically erasable memory for carrying out this method' [patent_app_type] => 1 [patent_app_number] => 6/852726 [patent_app_country] => US [patent_app_date] => 1986-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1843 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/811/04811293.pdf [firstpage_image] =>[orig_patent_app_number] => 852726 [rel_patent_id] =>[rel_patent_doc_number] =>)