Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2422291
[patent_doc_number] => 04742490
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-03
[patent_title] => 'Integrated semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 6/811932
[patent_app_country] => US
[patent_app_date] => 1985-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6056
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 353
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/742/04742490.pdf
[firstpage_image] =>[orig_patent_app_number] => 811932
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/811932 | Integrated semiconductor memory | Dec 19, 1985 | Issued |
Array
(
[id] => 2340459
[patent_doc_number] => 04701882
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-10-20
[patent_title] => 'Bipolar RAM cell'
[patent_app_type] => 1
[patent_app_number] => 6/809982
[patent_app_country] => US
[patent_app_date] => 1985-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2228
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/701/04701882.pdf
[firstpage_image] =>[orig_patent_app_number] => 809982
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/809982 | Bipolar RAM cell | Dec 15, 1985 | Issued |
Array
(
[id] => 2301922
[patent_doc_number] => 04697251
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-29
[patent_title] => 'Bipolar RAM cell'
[patent_app_type] => 1
[patent_app_number] => 6/809551
[patent_app_country] => US
[patent_app_date] => 1985-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2199
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/697/04697251.pdf
[firstpage_image] =>[orig_patent_app_number] => 809551
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/809551 | Bipolar RAM cell | Dec 15, 1985 | Issued |
06/802571 | FOUR TRANSISTOR CROSS-COUPLED BITLINE CONTENT ADDRESSABLE MEMORY | Nov 26, 1985 | Abandoned |
Array
(
[id] => 2365040
[patent_doc_number] => 04694429
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-15
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/802376
[patent_app_country] => US
[patent_app_date] => 1985-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 4100
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/694/04694429.pdf
[firstpage_image] =>[orig_patent_app_number] => 802376
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/802376 | Semiconductor memory device | Nov 26, 1985 | Issued |
Array
(
[id] => 2425205
[patent_doc_number] => 04729116
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-01
[patent_title] => 'Bipolar programmable read only memory attaining high speed data read operation'
[patent_app_type] => 1
[patent_app_number] => 6/800866
[patent_app_country] => US
[patent_app_date] => 1985-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3312
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/729/04729116.pdf
[firstpage_image] =>[orig_patent_app_number] => 800866
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/800866 | Bipolar programmable read only memory attaining high speed data read operation | Nov 21, 1985 | Issued |
Array
(
[id] => 2332952
[patent_doc_number] => 04698789
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-10-06
[patent_title] => 'MOS semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 6/800301
[patent_app_country] => US
[patent_app_date] => 1985-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 4859
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/698/04698789.pdf
[firstpage_image] =>[orig_patent_app_number] => 800301
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/800301 | MOS semiconductor device | Nov 20, 1985 | Issued |
Array
(
[id] => 2392938
[patent_doc_number] => 04709352
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-11-24
[patent_title] => 'MOS read-only memory systems'
[patent_app_type] => 1
[patent_app_number] => 6/798681
[patent_app_country] => US
[patent_app_date] => 1985-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3571
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/709/04709352.pdf
[firstpage_image] =>[orig_patent_app_number] => 798681
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/798681 | MOS read-only memory systems | Nov 14, 1985 | Issued |
Array
(
[id] => 2391765
[patent_doc_number] => 04695978
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-22
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/798186
[patent_app_country] => US
[patent_app_date] => 1985-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2952
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/695/04695978.pdf
[firstpage_image] =>[orig_patent_app_number] => 798186
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/798186 | Semiconductor memory device | Nov 13, 1985 | Issued |
Array
(
[id] => 2421865
[patent_doc_number] => 04719595
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-12
[patent_title] => 'Data output circuit for a dynamic memory'
[patent_app_type] => 1
[patent_app_number] => 6/794542
[patent_app_country] => US
[patent_app_date] => 1985-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4511
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 461
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/719/04719595.pdf
[firstpage_image] =>[orig_patent_app_number] => 794542
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/794542 | Data output circuit for a dynamic memory | Nov 3, 1985 | Issued |
Array
(
[id] => 2464571
[patent_doc_number] => 04718043
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-05
[patent_title] => 'Memory circuit with improved power-down control'
[patent_app_type] => 1
[patent_app_number] => 6/792401
[patent_app_country] => US
[patent_app_date] => 1985-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2843
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/718/04718043.pdf
[firstpage_image] =>[orig_patent_app_number] => 792401
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/792401 | Memory circuit with improved power-down control | Oct 28, 1985 | Issued |
Array
(
[id] => 2427111
[patent_doc_number] => 04748596
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-31
[patent_title] => 'Semiconductor memory device with sense amplifiers'
[patent_app_type] => 1
[patent_app_number] => 6/792197
[patent_app_country] => US
[patent_app_date] => 1985-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 17
[patent_no_of_words] => 3267
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/748/04748596.pdf
[firstpage_image] =>[orig_patent_app_number] => 792197
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/792197 | Semiconductor memory device with sense amplifiers | Oct 27, 1985 | Issued |
Array
(
[id] => 2325004
[patent_doc_number] => 04689770
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-08-25
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/792071
[patent_app_country] => US
[patent_app_date] => 1985-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2855
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/689/04689770.pdf
[firstpage_image] =>[orig_patent_app_number] => 792071
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/792071 | Semiconductor memory device | Oct 27, 1985 | Issued |
Array
(
[id] => 2365039
[patent_doc_number] => 04694428
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-09-15
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 6/789846
[patent_app_country] => US
[patent_app_date] => 1985-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 4599
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/694/04694428.pdf
[firstpage_image] =>[orig_patent_app_number] => 789846
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/789846 | Semiconductor memory | Oct 20, 1985 | Issued |
Array
(
[id] => 2422833
[patent_doc_number] => 04744060
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-05-10
[patent_title] => 'Bipolar-transistor type random access memory having redundancy configuration'
[patent_app_type] => 1
[patent_app_number] => 6/788567
[patent_app_country] => US
[patent_app_date] => 1985-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 5066
[patent_no_of_claims] => 30
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[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/744/04744060.pdf
[firstpage_image] =>[orig_patent_app_number] => 788567
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/788567 | Bipolar-transistor type random access memory having redundancy configuration | Oct 16, 1985 | Issued |
Array
(
[id] => 2517876
[patent_doc_number] => 04796233
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-01-03
[patent_title] => 'Bipolar-transistor type semiconductor memory device having redundancy configuration'
[patent_app_type] => 1
[patent_app_number] => 6/788587
[patent_app_country] => US
[patent_app_date] => 1985-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/796/04796233.pdf
[firstpage_image] =>[orig_patent_app_number] => 788587
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/788587 | Bipolar-transistor type semiconductor memory device having redundancy configuration | Oct 16, 1985 | Issued |
Array
(
[id] => 2341366
[patent_doc_number] => 04712196
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-12-08
[patent_title] => 'Data processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/788251
[patent_app_country] => US
[patent_app_date] => 1985-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 5424
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[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/712/04712196.pdf
[firstpage_image] =>[orig_patent_app_number] => 788251
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/788251 | Data processing apparatus | Oct 16, 1985 | Issued |
Array
(
[id] => 2453099
[patent_doc_number] => 04740925
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-26
[patent_title] => 'Extra row for testing programmability and speed of ROMS'
[patent_app_type] => 1
[patent_app_number] => 6/786992
[patent_app_country] => US
[patent_app_date] => 1985-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1813
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/740/04740925.pdf
[firstpage_image] =>[orig_patent_app_number] => 786992
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/786992 | Extra row for testing programmability and speed of ROMS | Oct 14, 1985 | Issued |
Array
(
[id] => 2456245
[patent_doc_number] => 04723225
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-02-02
[patent_title] => 'Programming current controller'
[patent_app_type] => 1
[patent_app_number] => 6/786981
[patent_app_country] => US
[patent_app_date] => 1985-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/04/723/04723225.pdf
[firstpage_image] =>[orig_patent_app_number] => 786981
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/786981 | Programming current controller | Oct 14, 1985 | Issued |
Array
(
[id] => 2451550
[patent_doc_number] => 04722075
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-26
[patent_title] => 'Equalized biased array for PROMS and EPROMS'
[patent_app_type] => 1
[patent_app_number] => 6/786991
[patent_app_country] => US
[patent_app_date] => 1985-10-15
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 1991
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/722/04722075.pdf
[firstpage_image] =>[orig_patent_app_number] => 786991
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/786991 | Equalized biased array for PROMS and EPROMS | Oct 14, 1985 | Issued |