Search

Lee D Wilson

Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3203, 3723, 3727
Total Applications
4059
Issued Applications
3286
Pending Applications
170
Abandoned Applications
602

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3657702 [patent_doc_number] => 05640348 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Non-volatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/549936 [patent_app_country] => US [patent_app_date] => 1995-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4607 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640348.pdf [firstpage_image] =>[orig_patent_app_number] => 549936 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549936
Non-volatile semiconductor memory Oct 29, 1995 Issued
Array ( [id] => 3631084 [patent_doc_number] => 05689463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/539237 [patent_app_country] => US [patent_app_date] => 1995-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3017 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689463.pdf [firstpage_image] =>[orig_patent_app_number] => 539237 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/539237
Semiconductor memory device Oct 3, 1995 Issued
Array ( [id] => 3657754 [patent_doc_number] => 05640352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Control circuit for output buffer circuits of a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/536660 [patent_app_country] => US [patent_app_date] => 1995-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 28 [patent_no_of_words] => 6744 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640352.pdf [firstpage_image] =>[orig_patent_app_number] => 536660 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/536660
Control circuit for output buffer circuits of a semiconductor memory device Sep 28, 1995 Issued
Array ( [id] => 3703487 [patent_doc_number] => 05650978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Semiconductor memory device having data transition detecting function' [patent_app_type] => 1 [patent_app_number] => 8/535859 [patent_app_country] => US [patent_app_date] => 1995-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5718 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650978.pdf [firstpage_image] =>[orig_patent_app_number] => 535859 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/535859
Semiconductor memory device having data transition detecting function Sep 27, 1995 Issued
Array ( [id] => 3629773 [patent_doc_number] => 05642326 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Dynamic memory' [patent_app_type] => 1 [patent_app_number] => 8/534558 [patent_app_country] => US [patent_app_date] => 1995-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6199 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642326.pdf [firstpage_image] =>[orig_patent_app_number] => 534558 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/534558
Dynamic memory Sep 26, 1995 Issued
Array ( [id] => 3691425 [patent_doc_number] => 05633832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Reduced area word line driving circuit for random access memory' [patent_app_type] => 1 [patent_app_number] => 8/533755 [patent_app_country] => US [patent_app_date] => 1995-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3468 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633832.pdf [firstpage_image] =>[orig_patent_app_number] => 533755 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/533755
Reduced area word line driving circuit for random access memory Sep 25, 1995 Issued
Array ( [id] => 3632986 [patent_doc_number] => 05612920 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Semiconductor memory device having a voltage down converter for generating an internal power supply voltage from an external power supply' [patent_app_type] => 1 [patent_app_number] => 8/529961 [patent_app_country] => US [patent_app_date] => 1995-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4511 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/612/05612920.pdf [firstpage_image] =>[orig_patent_app_number] => 529961 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/529961
Semiconductor memory device having a voltage down converter for generating an internal power supply voltage from an external power supply Sep 18, 1995 Issued
Array ( [id] => 3585086 [patent_doc_number] => 05523966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Memory cell and a memory device having reduced soft error' [patent_app_type] => 1 [patent_app_number] => 8/530421 [patent_app_country] => US [patent_app_date] => 1995-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7539 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/523/05523966.pdf [firstpage_image] =>[orig_patent_app_number] => 530421 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/530421
Memory cell and a memory device having reduced soft error Sep 17, 1995 Issued
Array ( [id] => 3657946 [patent_doc_number] => 05640366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Sequential -access asynchronous memory device and corresponding process for storage and reading' [patent_app_type] => 1 [patent_app_number] => 8/527137 [patent_app_country] => US [patent_app_date] => 1995-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4826 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640366.pdf [firstpage_image] =>[orig_patent_app_number] => 527137 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527137
Sequential -access asynchronous memory device and corresponding process for storage and reading Sep 11, 1995 Issued
Array ( [id] => 3697704 [patent_doc_number] => 05663901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems' [patent_app_type] => 1 [patent_app_number] => 8/527254 [patent_app_country] => US [patent_app_date] => 1995-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6543 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/663/05663901.pdf [firstpage_image] =>[orig_patent_app_number] => 527254 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/527254
Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems Sep 11, 1995 Issued
Array ( [id] => 3731931 [patent_doc_number] => 05682344 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Destructive read protection using address blocking technique' [patent_app_type] => 1 [patent_app_number] => 8/520258 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7357 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682344.pdf [firstpage_image] =>[orig_patent_app_number] => 520258 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520258
Destructive read protection using address blocking technique Sep 10, 1995 Issued
Array ( [id] => 3657790 [patent_doc_number] => 05638318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Ferroelectric memory using ferroelectric reference cells' [patent_app_type] => 1 [patent_app_number] => 8/520256 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7579 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638318.pdf [firstpage_image] =>[orig_patent_app_number] => 520256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520256
Ferroelectric memory using ferroelectric reference cells Sep 10, 1995 Issued
Array ( [id] => 3704127 [patent_doc_number] => 05680344 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Circuit and method of operating a ferrolectric memory in a DRAM mode' [patent_app_type] => 1 [patent_app_number] => 8/520259 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7875 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680344.pdf [firstpage_image] =>[orig_patent_app_number] => 520259 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520259
Circuit and method of operating a ferrolectric memory in a DRAM mode Sep 10, 1995 Issued
Array ( [id] => 3706629 [patent_doc_number] => 05677865 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Ferroelectric memory using reference charge circuit' [patent_app_type] => 1 [patent_app_number] => 8/520257 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7469 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677865.pdf [firstpage_image] =>[orig_patent_app_number] => 520257 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/520257
Ferroelectric memory using reference charge circuit Sep 10, 1995 Issued
Array ( [id] => 3890271 [patent_doc_number] => 05729501 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'High Speed SRAM with or-gate sense' [patent_app_type] => 1 [patent_app_number] => 8/525939 [patent_app_country] => US [patent_app_date] => 1995-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2419 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729501.pdf [firstpage_image] =>[orig_patent_app_number] => 525939 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/525939
High Speed SRAM with or-gate sense Sep 7, 1995 Issued
Array ( [id] => 3736522 [patent_doc_number] => 05652728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-29 [patent_title] => 'Dynamic memory' [patent_app_type] => 1 [patent_app_number] => 8/524930 [patent_app_country] => US [patent_app_date] => 1995-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 22494 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/652/05652728.pdf [firstpage_image] =>[orig_patent_app_number] => 524930 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/524930
Dynamic memory Sep 7, 1995 Issued
Array ( [id] => 3674269 [patent_doc_number] => 05668761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Fast read domino SRAM' [patent_app_type] => 1 [patent_app_number] => 8/525935 [patent_app_country] => US [patent_app_date] => 1995-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1820 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668761.pdf [firstpage_image] =>[orig_patent_app_number] => 525935 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/525935
Fast read domino SRAM Sep 7, 1995 Issued
Array ( [id] => 3630589 [patent_doc_number] => 05615160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Minimal recharge overhead circuit for domino SRAM structures' [patent_app_type] => 1 [patent_app_number] => 8/525994 [patent_app_country] => US [patent_app_date] => 1995-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2135 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615160.pdf [firstpage_image] =>[orig_patent_app_number] => 525994 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/525994
Minimal recharge overhead circuit for domino SRAM structures Sep 7, 1995 Issued
Array ( [id] => 3712653 [patent_doc_number] => 05646893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Segmented read line circuit particularly useful for multi-port storage arrays' [patent_app_type] => 1 [patent_app_number] => 8/525431 [patent_app_country] => US [patent_app_date] => 1995-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5503 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646893.pdf [firstpage_image] =>[orig_patent_app_number] => 525431 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/525431
Segmented read line circuit particularly useful for multi-port storage arrays Sep 6, 1995 Issued
Array ( [id] => 3657932 [patent_doc_number] => 05640365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency' [patent_app_type] => 1 [patent_app_number] => 8/524630 [patent_app_country] => US [patent_app_date] => 1995-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6699 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640365.pdf [firstpage_image] =>[orig_patent_app_number] => 524630 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/524630
Semiconductor memory device with a decoding peripheral circuit for improving the operation frequency Sep 6, 1995 Issued
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