Search

Lee D Wilson

Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3203, 3723, 3727
Total Applications
4059
Issued Applications
3286
Pending Applications
170
Abandoned Applications
602

Applications

Application numberTitle of the applicationFiling DateStatus
06/781421 RADIATION HARD GATED FEEDBACK MEMORY CELL Sep 29, 1985 Abandoned
Array ( [id] => 2422308 [patent_doc_number] => 04742491 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-03 [patent_title] => 'Memory cell having hot-hole injection erase mode' [patent_app_type] => 1 [patent_app_number] => 6/780482 [patent_app_country] => US [patent_app_date] => 1985-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2664 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/742/04742491.pdf [firstpage_image] =>[orig_patent_app_number] => 780482 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/780482
Memory cell having hot-hole injection erase mode Sep 25, 1985 Issued
Array ( [id] => 2345222 [patent_doc_number] => 04669062 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-26 [patent_title] => 'Two-tiered dynamic random access memory (DRAM) cell' [patent_app_type] => 1 [patent_app_number] => 6/778542 [patent_app_country] => US [patent_app_date] => 1985-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 6034 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/669/04669062.pdf [firstpage_image] =>[orig_patent_app_number] => 778542 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/778542
Two-tiered dynamic random access memory (DRAM) cell Sep 19, 1985 Issued
Array ( [id] => 2456026 [patent_doc_number] => 04791611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-13 [patent_title] => 'VLSI dynamic memory' [patent_app_type] => 1 [patent_app_number] => 6/774981 [patent_app_country] => US [patent_app_date] => 1985-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4285 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/791/04791611.pdf [firstpage_image] =>[orig_patent_app_number] => 774981 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/774981
VLSI dynamic memory Sep 10, 1985 Issued
Array ( [id] => 2391784 [patent_doc_number] => 04695979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-22 [patent_title] => 'Modified four transistor EEPROM cell' [patent_app_type] => 1 [patent_app_number] => 6/773492 [patent_app_country] => US [patent_app_date] => 1985-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1595 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/695/04695979.pdf [firstpage_image] =>[orig_patent_app_number] => 773492 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/773492
Modified four transistor EEPROM cell Sep 8, 1985 Issued
Array ( [id] => 2331832 [patent_doc_number] => 04636989 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Dynamic MOS random access memory' [patent_app_type] => 1 [patent_app_number] => 6/771899 [patent_app_country] => US [patent_app_date] => 1985-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9029 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636989.pdf [firstpage_image] =>[orig_patent_app_number] => 771899 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/771899
Dynamic MOS random access memory Sep 2, 1985 Issued
Array ( [id] => 2309948 [patent_doc_number] => 04691298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-01 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/770576 [patent_app_country] => US [patent_app_date] => 1985-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7648 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/691/04691298.pdf [firstpage_image] =>[orig_patent_app_number] => 770576 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/770576
Semiconductor memory Aug 28, 1985 Issued
Array ( [id] => 2422741 [patent_doc_number] => 04744055 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-10 [patent_title] => 'Erasure means and data storage system incorporating improved erasure means' [patent_app_type] => 1 [patent_app_number] => 6/770137 [patent_app_country] => US [patent_app_date] => 1985-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3120 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/744/04744055.pdf [firstpage_image] =>[orig_patent_app_number] => 770137 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/770137
Erasure means and data storage system incorporating improved erasure means Aug 27, 1985 Issued
Array ( [id] => 2340511 [patent_doc_number] => 04701886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-20 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 6/768112 [patent_app_country] => US [patent_app_date] => 1985-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4788 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/701/04701886.pdf [firstpage_image] =>[orig_patent_app_number] => 768112 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/768112
Semiconductor integrated circuit device Aug 20, 1985 Issued
Array ( [id] => 2305272 [patent_doc_number] => 04682306 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-21 [patent_title] => 'Self-refresh control circuit for dynamic semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/767602 [patent_app_country] => US [patent_app_date] => 1985-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2640 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/682/04682306.pdf [firstpage_image] =>[orig_patent_app_number] => 767602 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/767602
Self-refresh control circuit for dynamic semiconductor memory device Aug 19, 1985 Issued
Array ( [id] => 2331861 [patent_doc_number] => 04636991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Summation of address transition signals' [patent_app_type] => 1 [patent_app_number] => 6/766616 [patent_app_country] => US [patent_app_date] => 1985-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12189 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636991.pdf [firstpage_image] =>[orig_patent_app_number] => 766616 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/766616
Summation of address transition signals Aug 15, 1985 Issued
Array ( [id] => 2227977 [patent_doc_number] => RE032236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'One device field effect transistor (FET) AC stable random access memory (RAM) array' [patent_app_type] => 2 [patent_app_number] => 6/763171 [patent_app_country] => US [patent_app_date] => 1985-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4471 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 28 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/032/RE032236.pdf [firstpage_image] =>[orig_patent_app_number] => 763171 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763171
One device field effect transistor (FET) AC stable random access memory (RAM) array Aug 6, 1985 Issued
Array ( [id] => 2331203 [patent_doc_number] => 04680734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/762531 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4271 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/680/04680734.pdf [firstpage_image] =>[orig_patent_app_number] => 762531 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/762531
Semiconductor memory device Aug 4, 1985 Issued
Array ( [id] => 2347734 [patent_doc_number] => 04661931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-28 [patent_title] => 'Asynchronous row and column control' [patent_app_type] => 1 [patent_app_number] => 6/762341 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8886 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/661/04661931.pdf [firstpage_image] =>[orig_patent_app_number] => 762341 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/762341
Asynchronous row and column control Aug 4, 1985 Issued
Array ( [id] => 2355623 [patent_doc_number] => 04692901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-08 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/762632 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8819 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/692/04692901.pdf [firstpage_image] =>[orig_patent_app_number] => 762632 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/762632
Semiconductor memory Aug 4, 1985 Issued
Array ( [id] => 2364028 [patent_doc_number] => 04658381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-14 [patent_title] => 'Bit line precharge on a column address change' [patent_app_type] => 1 [patent_app_number] => 6/762362 [patent_app_country] => US [patent_app_date] => 1985-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8696 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/658/04658381.pdf [firstpage_image] =>[orig_patent_app_number] => 762362 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/762362
Bit line precharge on a column address change Aug 4, 1985 Issued
Array ( [id] => 2331275 [patent_doc_number] => 04680738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-14 [patent_title] => 'Memory with sequential mode' [patent_app_type] => 1 [patent_app_number] => 6/760712 [patent_app_country] => US [patent_app_date] => 1985-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3109 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/680/04680738.pdf [firstpage_image] =>[orig_patent_app_number] => 760712 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/760712
Memory with sequential mode Jul 29, 1985 Issued
Array ( [id] => 2343234 [patent_doc_number] => 04677589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-30 [patent_title] => 'Dynamic random access memory cell having a charge amplifier' [patent_app_type] => 1 [patent_app_number] => 6/759532 [patent_app_country] => US [patent_app_date] => 1985-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 3163 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/677/04677589.pdf [firstpage_image] =>[orig_patent_app_number] => 759532 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/759532
Dynamic random access memory cell having a charge amplifier Jul 25, 1985 Issued
Array ( [id] => 2331222 [patent_doc_number] => 04680735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-07-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/759142 [patent_app_country] => US [patent_app_date] => 1985-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4123 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/680/04680735.pdf [firstpage_image] =>[orig_patent_app_number] => 759142 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/759142
Semiconductor memory device Jul 25, 1985 Issued
Array ( [id] => 2393388 [patent_doc_number] => 04737935 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-04-12 [patent_title] => 'Integrated write/read memory' [patent_app_type] => 1 [patent_app_number] => 6/759042 [patent_app_country] => US [patent_app_date] => 1985-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10299 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 544 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/737/04737935.pdf [firstpage_image] =>[orig_patent_app_number] => 759042 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/759042
Integrated write/read memory Jul 24, 1985 Issued
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