Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2351826
[patent_doc_number] => 04656608
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-07
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/737076
[patent_app_country] => US
[patent_app_date] => 1985-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 3481
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/656/04656608.pdf
[firstpage_image] =>[orig_patent_app_number] => 737076
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/737076 | Semiconductor memory device | May 22, 1985 | Issued |
Array
(
[id] => 2340576
[patent_doc_number] => 04701889
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-10-20
[patent_title] => 'Static semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/737006
[patent_app_country] => US
[patent_app_date] => 1985-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3585
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/701/04701889.pdf
[firstpage_image] =>[orig_patent_app_number] => 737006
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/737006 | Static semiconductor memory device | May 22, 1985 | Issued |
Array
(
[id] => 2331255
[patent_doc_number] => 04680737
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-07-14
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 6/727922
[patent_app_country] => US
[patent_app_date] => 1985-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 5785
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/680/04680737.pdf
[firstpage_image] =>[orig_patent_app_number] => 727922
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/727922 | Semiconductor integrated circuit device | Apr 28, 1985 | Issued |
Array
(
[id] => 2359040
[patent_doc_number] => 04654831
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'High speed CMOS current sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 6/722251
[patent_app_country] => US
[patent_app_date] => 1985-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3251
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654831.pdf
[firstpage_image] =>[orig_patent_app_number] => 722251
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/722251 | High speed CMOS current sense amplifier | Apr 10, 1985 | Issued |
06/720896 | SEMICONDUCTOR MEMORY | Apr 7, 1985 | Abandoned |
Array
(
[id] => 2358967
[patent_doc_number] => 04654823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'Read/write memory and cell constituting same'
[patent_app_type] => 1
[patent_app_number] => 6/720931
[patent_app_country] => US
[patent_app_date] => 1985-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2980
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654823.pdf
[firstpage_image] =>[orig_patent_app_number] => 720931
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/720931 | Read/write memory and cell constituting same | Apr 7, 1985 | Issued |
06/720472 | VIDEO DISPLAY SYSTEM USING SERIAL/PARALLEL ACCESS MEMORIES | Apr 4, 1985 | Abandoned |
Array
(
[id] => 2328505
[patent_doc_number] => 04670860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-02
[patent_title] => 'Information holding device'
[patent_app_type] => 1
[patent_app_number] => 6/719876
[patent_app_country] => US
[patent_app_date] => 1985-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 1785
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/670/04670860.pdf
[firstpage_image] =>[orig_patent_app_number] => 719876
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/719876 | Information holding device | Apr 3, 1985 | Issued |
Array
(
[id] => 2299648
[patent_doc_number] => 04660181
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-21
[patent_title] => 'Memory system'
[patent_app_type] => 1
[patent_app_number] => 6/714396
[patent_app_country] => US
[patent_app_date] => 1985-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4026
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/660/04660181.pdf
[firstpage_image] =>[orig_patent_app_number] => 714396
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/714396 | Memory system | Mar 20, 1985 | Issued |
Array
(
[id] => 2418396
[patent_doc_number] => 04761768
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-02
[patent_title] => 'Programmable logic device'
[patent_app_type] => 1
[patent_app_number] => 6/707662
[patent_app_country] => US
[patent_app_date] => 1985-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 7259
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/761/04761768.pdf
[firstpage_image] =>[orig_patent_app_number] => 707662
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/707662 | Programmable logic device | Mar 3, 1985 | Issued |
Array
(
[id] => 2286693
[patent_doc_number] => 04620299
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-10-28
[patent_title] => 'Row decoder'
[patent_app_type] => 1
[patent_app_number] => 6/709262
[patent_app_country] => US
[patent_app_date] => 1985-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4049
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/620/04620299.pdf
[firstpage_image] =>[orig_patent_app_number] => 709262
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/709262 | Row decoder | Mar 3, 1985 | Issued |
Array
(
[id] => 2345258
[patent_doc_number] => 04669064
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-26
[patent_title] => 'Semiconductor memory device with improved data write function'
[patent_app_type] => 1
[patent_app_number] => 6/705831
[patent_app_country] => US
[patent_app_date] => 1985-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 3428
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/669/04669064.pdf
[firstpage_image] =>[orig_patent_app_number] => 705831
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/705831 | Semiconductor memory device with improved data write function | Feb 25, 1985 | Issued |
Array
(
[id] => 2297876
[patent_doc_number] => 04639894
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-27
[patent_title] => 'Data transferring method'
[patent_app_type] => 1
[patent_app_number] => 6/705001
[patent_app_country] => US
[patent_app_date] => 1985-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 2090
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/639/04639894.pdf
[firstpage_image] =>[orig_patent_app_number] => 705001
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/705001 | Data transferring method | Feb 24, 1985 | Issued |
Array
(
[id] => 2328487
[patent_doc_number] => 04670859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-02
[patent_title] => 'Logic circuit'
[patent_app_type] => 1
[patent_app_number] => 6/704412
[patent_app_country] => US
[patent_app_date] => 1985-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4445
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/670/04670859.pdf
[firstpage_image] =>[orig_patent_app_number] => 704412
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/704412 | Logic circuit | Feb 21, 1985 | Issued |
Array
(
[id] => 2351891
[patent_doc_number] => 04656611
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-07
[patent_title] => 'Logic circuit'
[patent_app_type] => 1
[patent_app_number] => 6/705321
[patent_app_country] => US
[patent_app_date] => 1985-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 19
[patent_no_of_words] => 4726
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/656/04656611.pdf
[firstpage_image] =>[orig_patent_app_number] => 705321
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/705321 | Logic circuit | Feb 21, 1985 | Issued |
Array
(
[id] => 2346811
[patent_doc_number] => 04713796
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-12-15
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 6/701226
[patent_app_country] => US
[patent_app_date] => 1985-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 11408
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/713/04713796.pdf
[firstpage_image] =>[orig_patent_app_number] => 701226
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/701226 | Semiconductor integrated circuit | Feb 12, 1985 | Issued |
Array
(
[id] => 2360783
[patent_doc_number] => 04651305
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-17
[patent_title] => 'Sense amplifier bit line isolation scheme'
[patent_app_type] => 1
[patent_app_number] => 6/700571
[patent_app_country] => US
[patent_app_date] => 1985-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1568
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/651/04651305.pdf
[firstpage_image] =>[orig_patent_app_number] => 700571
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/700571 | Sense amplifier bit line isolation scheme | Feb 10, 1985 | Issued |
Array
(
[id] => 2353081
[patent_doc_number] => 04649523
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-10
[patent_title] => 'Semiconductor memory with boosted word line'
[patent_app_type] => 1
[patent_app_number] => 6/699661
[patent_app_country] => US
[patent_app_date] => 1985-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3034
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/649/04649523.pdf
[firstpage_image] =>[orig_patent_app_number] => 699661
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/699661 | Semiconductor memory with boosted word line | Feb 7, 1985 | Issued |
Array
(
[id] => 2252136
[patent_doc_number] => 04633442
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-30
[patent_title] => 'Protective circuitry for a read only memory'
[patent_app_type] => 1
[patent_app_number] => 6/697992
[patent_app_country] => US
[patent_app_date] => 1985-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1131
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 339
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/633/04633442.pdf
[firstpage_image] =>[orig_patent_app_number] => 697992
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/697992 | Protective circuitry for a read only memory | Feb 3, 1985 | Issued |
Array
(
[id] => 2287181
[patent_doc_number] => 04627030
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-02
[patent_title] => 'Dual port memory word size expansion technique'
[patent_app_type] => 1
[patent_app_number] => 6/698076
[patent_app_country] => US
[patent_app_date] => 1985-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2708
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/627/04627030.pdf
[firstpage_image] =>[orig_patent_app_number] => 698076
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/698076 | Dual port memory word size expansion technique | Feb 3, 1985 | Issued |