Lee D Wilson
Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )
Most Active Art Unit | 3723 |
Art Unit(s) | 3203, 3723, 3727 |
Total Applications | 4059 |
Issued Applications | 3286 |
Pending Applications | 170 |
Abandoned Applications | 602 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
06/465532 | METHOD AND APPARATUS FOR THE FUNCTIONAL TESTING OF A MEMORY WHICH IS REPROGRAMMABLE ELECTRICALLY WORD BY WORD | Feb 9, 1983 | Abandoned |
06/465531 | WORD-BY-WORD ELECTRICALLY REPROGRAMMABLE NON-VOLATILE MEMORY AND METHOD OF OPERATION THEREOF | Feb 9, 1983 | Abandoned |
Array
(
[id] => 2205039
[patent_doc_number] => 04542481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-17
[patent_title] => 'One-device random access memory cell having enhanced capacitance'
[patent_app_type] => 1
[patent_app_number] => 6/462646
[patent_app_country] => US
[patent_app_date] => 1983-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 3107
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[patent_maintenance] => 1
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[pdf_file] => patents/04/542/04542481.pdf
[firstpage_image] =>[orig_patent_app_number] => 462646
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/462646 | One-device random access memory cell having enhanced capacitance | Jan 30, 1983 | Issued |
Array
(
[id] => 2275133
[patent_doc_number] => 04566081
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-21
[patent_title] => 'Semiconductor device with spare memory cells'
[patent_app_type] => 1
[patent_app_number] => 6/461951
[patent_app_country] => US
[patent_app_date] => 1983-01-28
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[pdf_file] => patents/04/566/04566081.pdf
[firstpage_image] =>[orig_patent_app_number] => 461951
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/461951 | Semiconductor device with spare memory cells | Jan 27, 1983 | Issued |
Array
(
[id] => 2453401
[patent_doc_number] => 04750158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-06-07
[patent_title] => 'Integrated matrix of nonvolatile, reprogrammable storage cells'
[patent_app_type] => 1
[patent_app_number] => 6/461791
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[patent_app_date] => 1983-01-28
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/750/04750158.pdf
[firstpage_image] =>[orig_patent_app_number] => 461791
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/461791 | Integrated matrix of nonvolatile, reprogrammable storage cells | Jan 27, 1983 | Issued |
Array
(
[id] => 2060586
[patent_doc_number] => 04455625
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-06-19
[patent_title] => 'Random access memory cell'
[patent_app_type] => 1
[patent_app_number] => 6/458592
[patent_app_country] => US
[patent_app_date] => 1983-01-17
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 458592
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/458592 | Random access memory cell | Jan 16, 1983 | Issued |
Array
(
[id] => 2081189
[patent_doc_number] => RE031643
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-08-07
[patent_title] => 'Hold circuit for telephone system'
[patent_app_type] => 2
[patent_app_number] => 6/456257
[patent_app_country] => US
[patent_app_date] => 1983-01-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/RE/031/RE031643.pdf
[firstpage_image] =>[orig_patent_app_number] => 456257
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/456257 | Hold circuit for telephone system | Jan 5, 1983 | Issued |
Array
(
[id] => 2364441
[patent_doc_number] => 04665506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-12
[patent_title] => 'Memory system with write protection'
[patent_app_type] => 1
[patent_app_number] => 6/455182
[patent_app_country] => US
[patent_app_date] => 1983-01-03
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[pdf_file] => patents/04/665/04665506.pdf
[firstpage_image] =>[orig_patent_app_number] => 455182
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/455182 | Memory system with write protection | Jan 2, 1983 | Issued |
Array
(
[id] => 2127078
[patent_doc_number] => RE031789
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-01-01
[patent_title] => 'Telephone information displaying device'
[patent_app_type] => 2
[patent_app_number] => 6/453992
[patent_app_country] => US
[patent_app_date] => 1982-12-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/RE/031/RE031789.pdf
[firstpage_image] =>[orig_patent_app_number] => 453992
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/453992 | Telephone information displaying device | Dec 27, 1982 | Issued |
Array
(
[id] => 2271227
[patent_doc_number] => 04575824
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-03-11
[patent_title] => 'Method for controlling read-out or write in of semiconductor memory device and apparatus for the same'
[patent_app_type] => 1
[patent_app_number] => 6/453116
[patent_app_country] => US
[patent_app_date] => 1982-12-27
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 2195
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[pdf_file] => patents/04/575/04575824.pdf
[firstpage_image] =>[orig_patent_app_number] => 453116
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/453116 | Method for controlling read-out or write in of semiconductor memory device and apparatus for the same | Dec 26, 1982 | Issued |
Array
(
[id] => 2150008
[patent_doc_number] => 04559619
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-12-17
[patent_title] => 'Large capacity memory circuit with improved write control circuit'
[patent_app_type] => 1
[patent_app_number] => 6/452986
[patent_app_country] => US
[patent_app_date] => 1982-12-27
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[pdf_file] => patents/04/559/04559619.pdf
[firstpage_image] =>[orig_patent_app_number] => 452986
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/452986 | Large capacity memory circuit with improved write control circuit | Dec 26, 1982 | Issued |
Array
(
[id] => 2227449
[patent_doc_number] => 04583204
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-04-15
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 6/452436
[patent_app_country] => US
[patent_app_date] => 1982-12-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/583/04583204.pdf
[firstpage_image] =>[orig_patent_app_number] => 452436
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/452436 | Semiconductor memory device | Dec 22, 1982 | Issued |
Array
(
[id] => 2138720
[patent_doc_number] => 04551820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-11-05
[patent_title] => 'Dynamic RAM integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 6/452446
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[pdf_file] => patents/04/551/04551820.pdf
[firstpage_image] =>[orig_patent_app_number] => 452446
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/452446 | Dynamic RAM integrated circuit device | Dec 22, 1982 | Issued |
Array
(
[id] => 2247773
[patent_doc_number] => 04567581
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-28
[patent_title] => 'Column decoder circuit for use with memory using multiplexed row and column address lines'
[patent_app_type] => 1
[patent_app_number] => 6/452156
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[firstpage_image] =>[orig_patent_app_number] => 452156
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/452156 | Column decoder circuit for use with memory using multiplexed row and column address lines | Dec 21, 1982 | Issued |
Array
(
[id] => 2260660
[patent_doc_number] => 04590589
[patent_country] => US
[patent_kind] => NA
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[patent_title] => 'Electrically programmable read only memory'
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[patent_app_number] => 6/451821
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[firstpage_image] =>[orig_patent_app_number] => 451821
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/451821 | Electrically programmable read only memory | Dec 20, 1982 | Issued |
Array
(
[id] => 2286762
[patent_doc_number] => 04602356
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-07-22
[patent_title] => 'Semiconductor memory device'
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[pdf_file] => patents/04/602/04602356.pdf
[firstpage_image] =>[orig_patent_app_number] => 445921
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/445921 | Semiconductor memory device | Nov 30, 1982 | Issued |
Array
(
[id] => 2173203
[patent_doc_number] => 04541077
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-09-10
[patent_title] => 'Self compensating ROM circuit'
[patent_app_type] => 1
[patent_app_number] => 6/440921
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[pdf_file] => patents/04/541/04541077.pdf
[firstpage_image] =>[orig_patent_app_number] => 440921
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/440921 | Self compensating ROM circuit | Nov 11, 1982 | Issued |
Array
(
[id] => 2194503
[patent_doc_number] => 04546457
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-08
[patent_title] => 'Semiconductor memory device'
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[patent_app_number] => 6/439591
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[pdf_file] => patents/04/546/04546457.pdf
[firstpage_image] =>[orig_patent_app_number] => 439591
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/439591 | Semiconductor memory device | Nov 4, 1982 | Issued |
Array
(
[id] => 2194449
[patent_doc_number] => 04546454
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-10-08
[patent_title] => 'Non-volatile memory cell fuse element'
[patent_app_type] => 1
[patent_app_number] => 6/439602
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 439602
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/439602 | Non-volatile memory cell fuse element | Nov 4, 1982 | Issued |
Array
(
[id] => 2247720
[patent_doc_number] => 04567577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-28
[patent_title] => 'Impedance modulated CMOS RAM cell'
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[patent_app_number] => 6/439161
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[firstpage_image] =>[orig_patent_app_number] => 439161
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/439161 | Impedance modulated CMOS RAM cell | Nov 3, 1982 | Issued |