Search

Lee D Wilson

Examiner (ID: 175, Phone: (571)272-4499 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3203, 3723, 3727
Total Applications
4059
Issued Applications
3286
Pending Applications
170
Abandoned Applications
602

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2179623 [patent_doc_number] => 04514596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-30 [patent_title] => 'Telephone handsets' [patent_app_type] => 1 [patent_app_number] => 6/384184 [patent_app_country] => US [patent_app_date] => 1982-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1617 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/514/04514596.pdf [firstpage_image] =>[orig_patent_app_number] => 384184 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/384184
Telephone handsets May 31, 1982 Issued
Array ( [id] => 2317240 [patent_doc_number] => 04638457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-20 [patent_title] => 'Method and apparatus for the non-volatile storage of the count of an electronic counting circuit' [patent_app_type] => 1 [patent_app_number] => 6/383196 [patent_app_country] => US [patent_app_date] => 1982-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5215 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/638/04638457.pdf [firstpage_image] =>[orig_patent_app_number] => 383196 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/383196
Method and apparatus for the non-volatile storage of the count of an electronic counting circuit May 27, 1982 Issued
Array ( [id] => 2121456 [patent_doc_number] => 04489403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-12-18 [patent_title] => 'Fault alignment control system and circuits' [patent_app_type] => 1 [patent_app_number] => 6/381266 [patent_app_country] => US [patent_app_date] => 1982-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3594 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/489/04489403.pdf [firstpage_image] =>[orig_patent_app_number] => 381266 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/381266
Fault alignment control system and circuits May 23, 1982 Issued
Array ( [id] => 2150578 [patent_doc_number] => 04498155 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-02-05 [patent_title] => 'Semiconductor integrated circuit memory device with both serial and random access arrays' [patent_app_type] => 1 [patent_app_number] => 6/381096 [patent_app_country] => US [patent_app_date] => 1982-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 21 [patent_no_of_words] => 4932 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/498/04498155.pdf [firstpage_image] =>[orig_patent_app_number] => 381096 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/381096
Semiconductor integrated circuit memory device with both serial and random access arrays May 23, 1982 Issued
Array ( [id] => 2120815 [patent_doc_number] => 04468759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-08-28 [patent_title] => 'Testing method and apparatus for dram' [patent_app_type] => 1 [patent_app_number] => 6/374622 [patent_app_country] => US [patent_app_date] => 1982-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3951 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/468/04468759.pdf [firstpage_image] =>[orig_patent_app_number] => 374622 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/374622
Testing method and apparatus for dram May 2, 1982 Issued
Array ( [id] => 2121442 [patent_doc_number] => 04489402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-12-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 6/370914 [patent_app_country] => US [patent_app_date] => 1982-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5712 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/489/04489402.pdf [firstpage_image] =>[orig_patent_app_number] => 370914 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/370914
Semiconductor memory device Apr 21, 1982 Issued
Array ( [id] => 2240195 [patent_doc_number] => 04573146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-02-25 [patent_title] => 'Testing and evaluation of a semiconductor memory containing redundant memory elements' [patent_app_type] => 1 [patent_app_number] => 6/370171 [patent_app_country] => US [patent_app_date] => 1982-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4863 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/573/04573146.pdf [firstpage_image] =>[orig_patent_app_number] => 370171 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/370171
Testing and evaluation of a semiconductor memory containing redundant memory elements Apr 19, 1982 Issued
Array ( [id] => 2185267 [patent_doc_number] => 04507761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-26 [patent_title] => 'Functional command for semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/370172 [patent_app_country] => US [patent_app_date] => 1982-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4777 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/507/04507761.pdf [firstpage_image] =>[orig_patent_app_number] => 370172 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/370172
Functional command for semiconductor memory Apr 19, 1982 Issued
Array ( [id] => 2130598 [patent_doc_number] => 04482985 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-13 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 6/368162 [patent_app_country] => US [patent_app_date] => 1982-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 40 [patent_no_of_words] => 8157 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/482/04482985.pdf [firstpage_image] =>[orig_patent_app_number] => 368162 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/368162
Semiconductor integrated circuit Apr 13, 1982 Issued
Array ( [id] => 2071299 [patent_doc_number] => 04459683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-10 [patent_title] => 'Read resettable memory circuit' [patent_app_type] => 1 [patent_app_number] => 6/368182 [patent_app_country] => US [patent_app_date] => 1982-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8163 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/459/04459683.pdf [firstpage_image] =>[orig_patent_app_number] => 368182 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/368182
Read resettable memory circuit Apr 13, 1982 Issued
Array ( [id] => 2121431 [patent_doc_number] => 04489401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-12-18 [patent_title] => 'Electrical partitioning scheme for improving yields during the manufacture of semiconductor memory arrays' [patent_app_type] => 1 [patent_app_number] => 6/367332 [patent_app_country] => US [patent_app_date] => 1982-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5127 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/489/04489401.pdf [firstpage_image] =>[orig_patent_app_number] => 367332 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/367332
Electrical partitioning scheme for improving yields during the manufacture of semiconductor memory arrays Apr 11, 1982 Issued
Array ( [id] => 2176965 [patent_doc_number] => 04538245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-08-27 [patent_title] => 'Enabling circuit for redundant word lines in a semiconductor memory array' [patent_app_type] => 1 [patent_app_number] => 6/367331 [patent_app_country] => US [patent_app_date] => 1982-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7570 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/538/04538245.pdf [firstpage_image] =>[orig_patent_app_number] => 367331 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/367331
Enabling circuit for redundant word lines in a semiconductor memory array Apr 11, 1982 Issued
Array ( [id] => 2117223 [patent_doc_number] => 04485461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-27 [patent_title] => 'Memory circuit' [patent_app_type] => 1 [patent_app_number] => 6/367523 [patent_app_country] => US [patent_app_date] => 1982-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6231 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/485/04485461.pdf [firstpage_image] =>[orig_patent_app_number] => 367523 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/367523
Memory circuit Apr 11, 1982 Issued
Array ( [id] => 2203843 [patent_doc_number] => 04503525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-05 [patent_title] => 'Common circuit for dynamic memory refresh and system clock function' [patent_app_type] => 1 [patent_app_number] => 6/366275 [patent_app_country] => US [patent_app_date] => 1982-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 3012 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/503/04503525.pdf [firstpage_image] =>[orig_patent_app_number] => 366275 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/366275
Common circuit for dynamic memory refresh and system clock function Apr 6, 1982 Issued
Array ( [id] => 2108917 [patent_doc_number] => 04484310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-11-20 [patent_title] => 'Static noninverting memory cell for one propagation delay memory circuits' [patent_app_type] => 1 [patent_app_number] => 6/363194 [patent_app_country] => US [patent_app_date] => 1982-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/484/04484310.pdf [firstpage_image] =>[orig_patent_app_number] => 363194 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/363194
Static noninverting memory cell for one propagation delay memory circuits Mar 28, 1982 Issued
Array ( [id] => 2098867 [patent_doc_number] => 04456981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-06-26 [patent_title] => 'Modulation system for optical recording' [patent_app_type] => 1 [patent_app_number] => 6/359642 [patent_app_country] => US [patent_app_date] => 1982-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2482 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/456/04456981.pdf [firstpage_image] =>[orig_patent_app_number] => 359642 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/359642
Modulation system for optical recording Mar 18, 1982 Issued
Array ( [id] => 2211518 [patent_doc_number] => 04493058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-01-08 [patent_title] => 'Integrated circuit for writing, reading and erasing memory matrices with insulated-gate field-effect transistors having non-volatile storage behaviour' [patent_app_type] => 1 [patent_app_number] => 6/359536 [patent_app_country] => US [patent_app_date] => 1982-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 4186 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/493/04493058.pdf [firstpage_image] =>[orig_patent_app_number] => 359536 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/359536
Integrated circuit for writing, reading and erasing memory matrices with insulated-gate field-effect transistors having non-volatile storage behaviour Mar 17, 1982 Issued
Array ( [id] => 2142704 [patent_doc_number] => 04494221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-01-15 [patent_title] => 'Bit line precharging and equilibrating circuit' [patent_app_type] => 1 [patent_app_number] => 6/354193 [patent_app_country] => US [patent_app_date] => 1982-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2378 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/494/04494221.pdf [firstpage_image] =>[orig_patent_app_number] => 354193 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/354193
Bit line precharging and equilibrating circuit Mar 2, 1982 Issued
Array ( [id] => 2071314 [patent_doc_number] => 04459685 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1984-07-10 [patent_title] => 'Redundancy system for high speed, wide-word semiconductor memories' [patent_app_type] => 1 [patent_app_number] => 6/354192 [patent_app_country] => US [patent_app_date] => 1982-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4495 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/459/04459685.pdf [firstpage_image] =>[orig_patent_app_number] => 354192 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/354192
Redundancy system for high speed, wide-word semiconductor memories Mar 2, 1982 Issued
Array ( [id] => 2148721 [patent_doc_number] => 04506350 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-19 [patent_title] => 'Non-volatile semiconductor memory system' [patent_app_type] => 1 [patent_app_number] => 6/353515 [patent_app_country] => US [patent_app_date] => 1982-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 13528 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/506/04506350.pdf [firstpage_image] =>[orig_patent_app_number] => 353515 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/353515
Non-volatile semiconductor memory system Feb 28, 1982 Issued
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